首頁 馬達驅動器 有刷 DC (BDC) 馬達驅動器
首頁
馬達驅動器
有刷 DC (BDC) 馬達驅動器

DRV8701

現行

47-V 全橋智慧型閘極驅動器

立即訂購
產品規格表

DRV8701

現行
產品規格表 立即訂購

產品詳細資料

Number of full bridges 1 Vs (min) (V) 5.9 Vs ABS (max) (V) 47 Sleep current (µA) 9 Control mode PH/EN, PWM Control interface Hardware (GPIO) Features Current Regulation, Current sense Amplifier, Smart Gate Drive Topology External FET Rating Catalog Operating temperature range (°C) -40 to 125
Number of full bridges 1 Vs (min) (V) 5.9 Vs ABS (max) (V) 47 Sleep current (µA) 9 Control mode PH/EN, PWM Control interface Hardware (GPIO) Features Current Regulation, Current sense Amplifier, Smart Gate Drive Topology External FET Rating Catalog Operating temperature range (°C) -40 to 125
VQFN (RGE) 24 16 mm² 4 x 4
  • Single H-Bridge Gate Driver
    • Drives Four External N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • 5.9-V to 45-V Operating Supply Voltage Range
  • Two Control Interface Options
    • PH/EN (DRV8701E)
    • PWM (DRV8701P)
  • Adjustable Gate Drive (5 Levels)
    • 6-mA to 150-mA Source Current
    • 12.5-mA to 300-mA Sink Current
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Current Shunt Amplifier (20 V/V)
  • Integrated PWM Current Regulation
    • Limits Motor Inrush Current
  • Low-Power Sleep Mode (9 µA)
  • Two LDO Voltage Regulators to Power External
    Components
    • AVDD: 4.8 V, up to 30-mA Output Load
    • DVDD: 3.3 V, up to 30-mA Output Load
  • Small Package and Footprint
    • 24-Pin VQFN (PowerPAD™)
    • 4.0 × 4.0 × 0.9 mm
  • Protection Features:
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • Overcurrent Protection (OCP)
    • Pre-Driver Fault (PDF)
    • Thermal Shutdown (TSD)
    • Fault Condition Output (nFAULT)
  • Single H-Bridge Gate Driver
    • Drives Four External N-Channel MOSFETs
    • Supports 100% PWM Duty Cycle
  • 5.9-V to 45-V Operating Supply Voltage Range
  • Two Control Interface Options
    • PH/EN (DRV8701E)
    • PWM (DRV8701P)
  • Adjustable Gate Drive (5 Levels)
    • 6-mA to 150-mA Source Current
    • 12.5-mA to 300-mA Sink Current
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Current Shunt Amplifier (20 V/V)
  • Integrated PWM Current Regulation
    • Limits Motor Inrush Current
  • Low-Power Sleep Mode (9 µA)
  • Two LDO Voltage Regulators to Power External
    Components
    • AVDD: 4.8 V, up to 30-mA Output Load
    • DVDD: 3.3 V, up to 30-mA Output Load
  • Small Package and Footprint
    • 24-Pin VQFN (PowerPAD™)
    • 4.0 × 4.0 × 0.9 mm
  • Protection Features:
    • VM Undervoltage Lockout (UVLO)
    • Charge Pump Undervoltage (CPUV)
    • Overcurrent Protection (OCP)
    • Pre-Driver Fault (PDF)
    • Thermal Shutdown (TSD)
    • Fault Condition Output (nFAULT)

The DRV8701 is a single H-bridge gate driver that uses four external N-channel MOSFETs targeted to drive a 12-V to 24-V bidirectional brushed DC motor.

A PH/EN (DRV8701E) or PWM (DRV8701P) interface allows simple interfacing to controller circuits. An internal sense amplifier allows for adjustable current control. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.

DRV8701 drives both high- and low-side FETs with 9.5-V VGS gate drive. The gate drive current for all external FETs is configurable with a single external resistor on the IDRIVE pin.

A low-power sleep mode is provided which shuts down internal circuitry to achieve very-low quiescent current draw. This sleep mode can be set by taking the nSLEEP pin low.

Internal protection functions are provided: undervoltage lockout, charge pump faults, overcurrent shutdown, short-circuit protection, predriver faults, and overtemperature. Fault conditions are indicated on the nFAULT pin.

The DRV8701 is a single H-bridge gate driver that uses four external N-channel MOSFETs targeted to drive a 12-V to 24-V bidirectional brushed DC motor.

A PH/EN (DRV8701E) or PWM (DRV8701P) interface allows simple interfacing to controller circuits. An internal sense amplifier allows for adjustable current control. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping.

DRV8701 drives both high- and low-side FETs with 9.5-V VGS gate drive. The gate drive current for all external FETs is configurable with a single external resistor on the IDRIVE pin.

A low-power sleep mode is provided which shuts down internal circuitry to achieve very-low quiescent current draw. This sleep mode can be set by taking the nSLEEP pin low.

Internal protection functions are provided: undervoltage lockout, charge pump faults, overcurrent shutdown, short-circuit protection, predriver faults, and overtemperature. Fault conditions are indicated on the nFAULT pin.
filter 尋找其它 有刷 DC (BDC) 馬達驅動器
下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同，但引腳輸出與所比較的裝置不同
DRV8702-Q1 現行 車用 47-V 全橋智慧型閘極驅動器 Automotive variant

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 12
重要文件 類型 標題 格式選項 日期
* Data sheet DRV8701 Brushed DC Motor Full-Bridge Gate Driver datasheet (Rev. B) PDF | HTML 2015年 7月 6日
Application note Best Practices for Board Layout of Motor Drivers (Rev. B) PDF | HTML 2021年 10月 14日
Application note Understanding Smart Gate Drive (Rev. D) 2021年 3月 1日
Application note Methods to Configure Current Regulation for Brushed and Stepper Motors (Rev. B) PDF | HTML 2021年 1月 19日
Application note Detecting Short to Battery and Ground Conditions with TI Motor Gate Drivers PDF | HTML 2020年 5月 29日
Technical article Automating smart home blinds, shades and shutters with motor drivers PDF | HTML 2020年 1月 2日
White paper Smart Gate Drive 2019年 7月 2日
Application note Cut-Off Switch in High-Current Motor-Drive Applications (Rev. A) 2018年 8月 20日
Technical article Motor Drive forum top FAQs: 3 methods to prevent electrical overstress PDF | HTML 2015年 12月 21日
Technical article Evolution of the brushed DC driver PDF | HTML 2015年 10月 26日
Technical article Motor drive forum top FAQs: Electrical overstress PDF | HTML 2015年 9月 22日
Technical article Simplifying gate driver design for brushed DC motors PDF | HTML 2015年 6月 30日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DRV8701EVM — DRV8701 全橋有刷 DC 馬達閘極驅動器評估模組

DRV8701EVM（評估模組）做為評估套件，用於展示 TI 的 DRV8701 H 橋閘極驅動器。使用 MSP430G2553 控制馬達的速度與方向，同時監控來自 DRV8701 的馬達電流。功率級使用 DRV8701 H 橋閘極驅動器與 CSD18532Q5B N 通道 NexFETTM 功率 MOSFET 建立。該 EVM 採用高性能、電源效率且符合成本效益的平台，可加快開發速度並縮短上市時間。本 EVM 搭配操作簡便的應用程式，只需極少的外部設備即可快速啟動。

使用指南: PDF
TI.com 無法提供
模擬型號

DRV8701 TINA-TI Transient Reference Design

SLVMB82.TSC (673 KB) - TINA-TI Reference Design
下載
模擬型號

DRV8701 TINA-TI Transient Spice Model

SLVMB81.ZIP (101 KB) - TINA-TI Spice Model
下載
模擬型號

DRV8701E Transient Simulation Model (Rev. A)

SLVMAR3A.ZIP (90 KB) - PSpice Model
下載
參考設計

TIDA-00875 — 採用有刷馬達驅動器的單相無刷 DC (BLDC) 參考設計

TIDA-00875 demonstrates how to reconfigure existing brushed motor drivers to control single phase brushless (BLDC) motors. The DRV8801 and DRV8701 are used to control a single phase BLDC motor. The DRV8801 design controls the motor at 100% duty cycle. When the device is powered up, the motor runs. (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00620 — 12 至 24V、27A 有刷 DC 馬達參考設計

Brushed motors are a relatively popular option for motor designs because of their low price and simple control scheme.  A brushed motor has a wire-wound rotor and permanent magnet stator.  The commutation of the motor is achieved using conductive rings that are connected to the rotor (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGE) 24 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片