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乙太網路 PHY

DP83848K

現行

採用 40 針腳 QFN 封裝的工業溫度、10/100-Mbps 乙太網路 PHY 收發器

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產品規格表

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open-in-new 比較替代產品
功能相同，但針腳輸出與所比較的裝置不同。
DP83826AI 現行 低延遲 10/100-Mbps PHY，最適合具有工業溫度範圍的 EtherCAT(TM) 應用 This product is a newer 100Mbps PHY with lower latency and better cost structure.

DP83848K

現行
立即訂購

產品詳細資料

Datarate (Mbps) 10/100 Interface type MII, RMII Rating Catalog Number of ports Single Features IEEE 802.3 autonegotiation, Parallel detection I/O supply voltage (typ) (V) 3.3 Operating temperature range (°C) -40 to 85 Number of LEDs 2 ESD HBM (kV) 4
Datarate (Mbps) 10/100 Interface type MII, RMII Rating Catalog Number of ports Single Features IEEE 802.3 autonegotiation, Parallel detection I/O supply voltage (typ) (V) 3.3 Operating temperature range (°C) -40 to 85 Number of LEDs 2 ESD HBM (kV) 4
WQFN (RTA) 40 36 mm² (6 mm × 6 mm)
  • Low-Power 3.3-V, 0.18-µm CMOS Technology
  • Auto-MDIX for 10/100 Mb/s
  • Energy Detection Mode
  • 3.3-V MAC Interface
  • RMII Rev. 1.2 Interface (configurable)
  • MII Interface
  • MII Serial Management Interface (MDC and MDIO)
  • IEEE 802.3 Auto-Negotiation and Parallel Detection
  • IEEE 802.3 ENDEC, 10BASE-T Transceivers and Filters
  • IEEE 802.3 PCS, 100BASE-TX Transceivers and Filters
  • Integrated ANSI X3.263 Compliant TP-PMD Physical Sub-Layer with Adaptive Equalization and Baseline Wander Compensation
  • Error-Free Operation Beyond 137 Meters
  • ESD Protection – Greater than 4 kV Human Body Model
  • Configurable LED for Link and Activity (DP83848J/K)
  • 25-MHz Clock Output (DP83848H/M/T)
  • Single Register Access for Complete PHY Status
  • 10/100 Mb/s Packet BIST (Built-in Self Test)
  • Low-Power 3.3-V, 0.18-µm CMOS Technology
  • Auto-MDIX for 10/100 Mb/s
  • Energy Detection Mode
  • 3.3-V MAC Interface
  • RMII Rev. 1.2 Interface (configurable)
  • MII Interface
  • MII Serial Management Interface (MDC and MDIO)
  • IEEE 802.3 Auto-Negotiation and Parallel Detection
  • IEEE 802.3 ENDEC, 10BASE-T Transceivers and Filters
  • IEEE 802.3 PCS, 100BASE-TX Transceivers and Filters
  • Integrated ANSI X3.263 Compliant TP-PMD Physical Sub-Layer with Adaptive Equalization and Baseline Wander Compensation
  • Error-Free Operation Beyond 137 Meters
  • ESD Protection – Greater than 4 kV Human Body Model
  • Configurable LED for Link and Activity (DP83848J/K)
  • 25-MHz Clock Output (DP83848H/M/T)
  • Single Register Access for Complete PHY Status
  • 10/100 Mb/s Packet BIST (Built-in Self Test)

The DP83848x device addresses the quality, reliability and small form factor required for space sensitive applications in embedded systems.

The DP83848x offers performance far exceeding the IEEE specifications, with superior interoperability and industry leading performance beyond 137 meters of Cat-V cable. The DP83848x also offers Auto-MDIX to remove cabling complications. DP83848x has superior ESD protection, greater than 4 kV Human Body Model, providing extremely high reliability and robust operation, ensuring a high-level performance in all applications.

DP83848J/K offers two flexible LED indicators one for Link and the other for Speed. In addition, both MII and RMII are supported ensuring ease and flexibility of design.

The DP83848H/M/T incorporates a 25-MHz clock out that eliminates the need and hence the space and cost, of an additional clock source component.

The DP83848x is offered in small 6-mm × 6-mm WQFN 40-pin package and is ideal for industrial controls, building/factory automation, transportation, test equipment and wire-less base stations.

The DP83848x device addresses the quality, reliability and small form factor required for space sensitive applications in embedded systems.

The DP83848x offers performance far exceeding the IEEE specifications, with superior interoperability and industry leading performance beyond 137 meters of Cat-V cable. The DP83848x also offers Auto-MDIX to remove cabling complications. DP83848x has superior ESD protection, greater than 4 kV Human Body Model, providing extremely high reliability and robust operation, ensuring a high-level performance in all applications.

DP83848J/K offers two flexible LED indicators one for Link and the other for Speed. In addition, both MII and RMII are supported ensuring ease and flexibility of design.

The DP83848H/M/T incorporates a 25-MHz clock out that eliminates the need and hence the space and cost, of an additional clock source component.

The DP83848x is offered in small 6-mm × 6-mm WQFN 40-pin package and is ideal for industrial controls, building/factory automation, transportation, test equipment and wire-less base stations.
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針腳對針腳的功能與所比較的裝置相同。
DP83848J 現行 採用 40 針腳 QFN 封裝的商用溫度、10/100-Mbps 乙太網路 PHY 收發器 This product operates over a commercial temperature range of 0°C to 70°C
功能相同，但針腳輸出與所比較的裝置不同。
DP83848I 現行 商業溫度、10/100 Mbps 乙太網路 PHY 收發器，具 SNI 介面和 JTAG 支援 This product includes an SNI MDI and operates over an industrial temperature range of -40°C to 85°C
DP83848C 現行 商業溫度、10/100 Mbps 乙太網路 PHY 收發器，具 SNI 介面和 JTAG 支援 This product includes an SNI MDI and operates over a commercial temperature range of 0°C to 70°C

技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DP83848x PHYTER Mini / LS Single Port 10/100 MB/s Ethernet Transceiver datasheet (Rev. E) PDF | HTML 2014/9/8
應用說明 DP83848 to DP83826 Hardware Rollover Document PDF | HTML 2024/4/30
應用說明 How to Pass IEEE Ethernet Compliance Tests PDF | HTML 2021/9/20
選擇指南 Enhanced Product Selection Guide (Rev. C) PDF | HTML 2021/6/30
應用說明 Selection and specification of crystals for Texas Instruments ethernet physical 2019/2/6
技術文章 How to select the right industrial Ethernet standard: EtherCAT PDF | HTML 2015/9/17
技術文章 How to select the right industrial Ethernet standard: Sercos III PDF | HTML 2015/7/23
應用說明 Reducing Radiated Emissions in Ethernet 10/100 LAN Applications (Rev. A) 2013/4/26
應用說明 DP83848I PHYTER Single to DP83848K/T PHYTER Mini System Rollover Document (Rev. B) 2013/4/26
應用說明 Diff Between NSC 10/100 Mb/s Ethernet Physical Layer Devices (Rev. A) 2013/4/26
應用說明 AN-1519 DP83848 PHYTER® Transformerless Ethernet Operation (Rev. A) 2013/4/26
應用說明 AN-1540 Power Measurement of Ethernet Physical Layer Products (Rev. B) 2013/4/26
應用說明 AN-1469 PHYTER® Design & Layout Guide (Rev. D) 2013/4/26
應用說明 AN-1507 DP83848 and DP83849 100Mb Data Latency (Rev. B) 2013/4/26
使用指南 AN-1521 POEPHYTEREV-I / -E User Guide (Rev. C) 2013/4/26
應用說明 DP83848 - Single 10/100 Mb/s Ethernet Transceiver Ini During Pwr Dwn Mode (Rev. A) 2013/4/26
應用說明 DP83848 Sin 10/100Mb/s Ethernet Transcvr Reduced Media Indep Interfce RMII Mode (Rev. A) 2013/4/26
應用說明 AN-1511 Cable Discharge Event (Rev. A) 2013/4/26
應用說明 AN-1548 PHYTER 100 Base-TX Reference Clock Jitter Tolerance (Rev. B) 2013/4/26
應用說明 DP83848 - Single 10/100 Mb/s Ethernet Transceiver Energy Detect Mode (Rev. A) 2013/4/26
應用說明 AN-1499 DP83846 to DP83848C/I/YB PHYTER System Rollover Document (Rev. B) 2013/4/26
使用指南 DP83848K User Guide 2012/2/24

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DP83848I-POE-EK — PHYTER® 工業極端溫度單埠 10 100 Mbs 乙太網路實體層收發器

很高興您願意關注我們的 DP83848 10/100Mbps 乙太網路實體層 (PHYTER) 乙太網路供電 (POE) 媒體附加附件單元 (MAU) 評估套件 (EVK)。PHYTER POE MAU 為一功能齊全並支援電路系統的 DP83848 電路板，可在乙太網路供電網路中提供穩固的乙太網路連線。此電路板可配置為在連接至 POE 相容電源設備 (PSE) 時，從網路纜線汲取電力。透過符合 IEEE 802.3 標準媒體存取控制器 (MAC) 的 MII/RMII 連接時，電路板可提供線速、半雙工和全雙工、10Base-T 以及 100Base-TX (...)

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開發板

DP83848K-MAU-EK — 具 mini LS、單連接埠和 10/100 Mbs 的 PHYTER™ 乙太網路實體層收發器

The DP83848K addresses the quality, reliability and small form factor required for space-sensitive applications in embedded systems operating in the industrial temperature range. Use the DP83848K-MAU-EK to evaluate our mini-LS, industrial temperature, single-port, 10/100 Mbps PHYTER™ ethernet (...)

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開發模組 (EVM) 的 GUI

DIEP — Debug Interface for Ethernet PHYs (DIEP)

德州儀器乙太網路實體層 (PHY) 收發器的驅動程式支援透過序列管理介面 (MDC/MDIO) 進行通訊，以配置及讀取 PHY 暫存器。如需 Linux 和 RTOS 驅動程式，請前往我們的 github。

 

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支援軟體

USB-2-MDIO — USB-2-MDIO Tool v1.0

USB-2-MDIO 軟體工具可讓德州儀器的乙太網路 PHY 存取 MDIO 狀態和裝置控制暫存器。  USB-2-MDIO 工具包括 LaunchPad™ 開發套件，適用於與輕型 GUI 連接的 TI MSP430™ MCU。  LaunchPad 開發套件實作 MDIO 匯流排控制器，可處理連接匯流排之 PHY 上的暫存器。

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模擬型號

DP83848K IBIS Model

SNLM169.ZIP (15 KB) - IBIS 模型
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PCB 佈局

DP83848J/K POE Netlist

SNLC030.ZIP (2 KB) - PCB 佈局
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參考設計

TIDA-00207 — 符合 EN55011 規範、工業溫度、10/100Mbps 乙太網路 PHY 磚參考設計

此乙太網路 PHY 磚參考設計讓德州儀器的客戶能夠使用完全遵循 EN5501 A 類 EMI 要求的 TI 工業乙太網路 PHY 收發器裝置，快速設計系統並將其上市。提供 50 接腳介面以介接 32 位元 Cortex M4 處理器架構的控制器電路板。  電路板採用小巧外型尺寸 (2 英吋 x 3 英吋) 設計，可輕易融入現有產品。 

此參考設計展示了 DP83848K 乙太網路 PHY 收發器裝置的進階性能，支援 10/100 Base-T 並符合 IEEE 802.3 標準。整個參考設計皆以單電源供電 (5V 含板載穩壓器或 3.3V) 運作。乙太網路 PHY (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RTA) 40 Ultra Librarian
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