DP83826E
- Low and deterministic latency
- TX latency: 40ns, RX latency: 170ns
- Deterministic latency over power cycles < ±2ns
- Fixed phase XI to TX_CLK relationship < ±2ns
- Robust and small system implementation
- Integrated circuitry for enhanced EMC
- IEC 61000-4-2 ESD: ± 8kV contact, ±15kV air
- IEC 61000-4-4 EFT: ±4 kV at 5kHz, 100kHz
- CISPR 22 conducted emissions Class B
- CISPR 22 radiated emissions Class B
- Fast link-drop < 10µs
- Cable reach > 150 meters
- Voltage mode line driver
- Integrated terminations on MAC interface
- Voltage tolerance: ±10%
- Two selectable pin modes in single device
- ENHANCED mode for additional features
- BASIC mode for common Ethernet pinout
- Low power consumption < 160mW
- MAC interfaces: MII, RMII
- Programmable energy-saving modes
- Active sleep
- Deep power down
- Energy Efficient Ethernet (EEE) IEEE 802.3az
- Wake-on-LAN (WoL)
- Diagnostic tools: cable diagnostics, built-in self-test (BIST), loopback modes
- Single, 3.3V power supply
- I/O voltages: 1.8V or 3.3V
- RMII back-to-back repeater mode
- DP83826E operating temperature range: –40°C to 105°C
- DP83826I operating temperature range: –40°C to 85°C
- IEEE 802.3 compliant: 10BASE-Te, 100BASE-TX
- EtherCAT compliant
The DP83826 offers low and deterministic latency, low power and supports 10BASE-Te, 100BASE-TX Ethernet protocols to meet stringent requirements in real-time industrial Ethernet systems. The device includes hardware bootstraps to achieve fast link-up time, fast link-drop detection modes and dedicated reference CLKOUT to clock synchronize other modules on the systems.
The two configurable modes are BASIC standard Ethernet mode that uses a common Ethernet pinout, and ENHANCED Ethernet mode which supports standard Ethernet mode and multiple industrial Ethernet fieldbus applications with the additional features and hardware bootstraps configuration.
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設計與開發
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DP83826-EVM-AM2 — 適用於工業乙太網路 PHY 附加電路板的 AM2x 評估模組
DP83826EVM — DP83826 低延遲 10/100 乙太網路 PHY 評估模組
DIEP — Debug Interface for Ethernet PHYs (DIEP)
德州儀器乙太網路實體層 (PHY) 收發器的驅動程式支援透過序列管理介面 (MDC/MDIO) 進行通訊,以配置及讀取 PHY 暫存器。如需 Linux 和 RTOS 驅動程式,請前往我們的 github。
USB-2-MDIO — USB-2-MDIO Tool v1.0
USB-2-MDIO 軟體工具可讓德州儀器的乙太網路 PHY 存取 MDIO 狀態和裝置控制暫存器。 USB-2-MDIO 工具包括 LaunchPad™ 開發套件,適用於與輕型 GUI 連接的 TI MSP430™ MCU。 LaunchPad 開發套件實作 MDIO 匯流排控制器,可處理連接匯流排之 PHY 上的暫存器。
SLVRBN4 — DP83826 Schematic Design Review Checklist
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
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