開發模組 (EVM) 的 GUI
CDCE72010
- High Performance LVPECL, LVDS, LVCMOS PLL Clock Synchronizer
- Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy
Support with Manual or Automatic Selection - Accepts Two Differential Input (LVPECL or LVDS) References up to 500MHz
(or Two LVCMOS Inputs up to 250MHz) as PLL Reference - VCXO_IN Clock is Synchronized to One of Two Reference Clocks
- VCXO_IN Frequencies up to 1.5GHz (LVPECL)
800MHz for LVDS and
250MHz for LVCMOS Level Signaling - Outputs Can be a Combination of LVPECL, LVDS, and LVCMOS
(Up to 10 Differential LVPECL or LVDS Outputs or up to
20 LVCMOS Outputs), Output 9 can be Converted to an
Auxiliary Input as a 2nd VC(X)O. - Output Divider is Selectable to Divide by 1, 2, 3, 4, 5, 6, 8, 10,
12, 16, 18, 20, 24, 28, 30, 32, 36, 40, 42, 48, 50, 56, 60, 64, 70,
or 80 On Each Output Individually up to Eight Dividers. (Except for
Output 0 and 9, Output 0 Follows Output 1 Divider and Output 9
Follows Output 8 Divider) - SPI Controllable Device Setting
- Individual Output Enable Control via SPI Interface
- Integrated On-Chip Non-Volatile Memory (EEPROM) to Store Settings
without the Need to Apply High Voltage to the Device - Optional Configuration Pins to Select Between Two Default Settings
Stored in EEPROM - Efficient Jitter Cleaning from Low PLL Loop Bandwidth
- Very Low Phase Noise PLL Core
- Programmable Phase Offset (Input Reference to Outputs)
- Wide Charge-Pump Current Range From 200µA to 3mA
- Presets Charge-Pump to VCC_CP/2 for Fast Center-Frequency
Setting of VC(X)O, Controlled Via the SPI Bus - SERDES Startup Mode (Depending on VCXO Range)
- Auxiliary Input: Output 9 can Serve as 2nd VCXO Input to Drive
All Outputs or to Serve as PLL Feedback Signal - RESET or HOLD Input Pin to Serve as Reset or Hold Functions
- REFERENCE SELECT for Manual Select Between Primary and Secondary
Reference Clocks - POWER DOWN (PD) to Put Device in Standby Mode
- Analog and Digital PLL Lock Indicator
- Internally Generated VBB Bias Voltages for Single-Ended Input Signals
- Frequency Hold-Over Mode Activated by HOLD Pin or SPI Bus to Improve
Fail-Safe Operation - Input to All Outputs Skew Control
- Individual Skew Control for Each Output with Each Output Divider
- Packaged in a QFN-64 Package
- ESD Protection Exceeds 2kV HBM
- Industrial Temperature Range of –40°C to 85°
The CDCE72010 is a high-performance, low phase noise, and low skew clock synchronizer that synchronizes a VCXO (Voltage Controlled Crystal Oscillator) or VCO (Voltage Controlled Oscillator) frequency to one of two reference clocks. The clock path is fully programmable providing the user with a high degree of flexibility. The following relationship applies to the dividers:
Frequency (VCXO_IN or AUX_IN) / Frequency (PRI_REF or SEC_REF) = (P*N)/(R*M)
The VC(X)O_IN clock operates up to 1.5GHz through the selection of external VC(X)O and loop filter components. The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements.
The CDCE72010 can lock to one of two reference clock inputs (PRI_REF and SEC_REF) and supports frequency hold-over mode for fail-safe and system redundancy. The outputs of the CDCE72010 are user definable and can be any combination of up to 10 LVPECL/LVDS outputs or up to 20 LVCMOS outputs. The built-in synchronization latches ensure that all outputs are synchronized for very low output skew.
All device settings, including output signaling, divider value selection, input selection, and many more, are programmable with the SPI (4-wire Serial Peripheral Interface). The SPI allows individual control of the device settings.
The device operates in a 3.3V environment and is characterized for operation from –40°C to +85°C.
The CDCE72010 is available in a 64-pin lead-free “green” plastic quad flatpack package with enhanced bottom thermal pad for heat dissipation. The Texas Instruments package designator is RGC (S-PQFP-N64).
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開發板
ADS4122EVM — ADS4122 12 位元、65-MSPS 類比轉數位轉換器評估模組
The ADS4122EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4122 device, an extremely low power 12-bit 65 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)
開發板
ADS4129EVM — ADS4129 12 位元、250-MSPS 類比轉數位轉換器評估模組
The ADS4129EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' ADS4129 device, an extremely low power 12-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible environment to (...)
開發板
ADS4142EVM — ADS4142 14 位元、65 MSPS 類比轉數位轉換器評估模組
The ADS4142EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4142 device, an extremely low power 14-bit 65 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible (...)
開發板
ADS41B25EVM — ADS41B25 12 位元、125-MSPS 類比轉數位轉換器評估模組
The ADS41B25EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS41B25 device, an extremely low power 12-bit 125 MSPS analog to digital converter with integrated high-impedance input buffer. The ADC features a configurable parallel DDR LVDS or CMOS (...)
開發板
ADS41B29EVM — ADS41B29 12 位元、250-MSPS 類比轉數位轉換器評估模組
ADS41B29EVM 是一款電路板，設計人員可藉此評估德州儀器 (TI) ADS41B29 裝置的效能，此裝置是一款極低功耗的 12 位元 250 MSPS 類比數位轉換器，整合高阻抗輸入緩衝器。ADC 具有可配置的並行 DDR LVDS 或 CMOS 輸出。EVM 提供了可在各種時鐘、輸入和電源條件下測試 ADS41B29 的靈活環境。
ADS41B29EVM 還包括德州儀器的新款 10 輸出低抖動時鐘同步器和抖動消除器裝置 - CDCE72010，可用於驅動 ADS41B29 的時鐘輸入。我們為外部 VCXO 和晶體帶通濾波器提供了開放式插槽，允許對組合的高性能 ADC 與時鐘電路 (...)
開發板
ADS4222EVM — ADS4222 雙通道、12 位元、65-MSPS 類比轉數位轉換器評估模組
使用指南: PDF
開發板
ADS4225EVM — ADS4225 雙通道、12 位元、125-MSPS 類比轉數位轉換器評估模組
The ADS4225EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4225 device, an extremely low power dual channel 12-bit 125 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
使用指南: PDF
開發板
ADS4229EVM — ADS4229 雙通道、12 位元、250-MSPS 類比轉數位轉換器評估模組
使用指南: PDF
開發板
ADS4242EVM — ADS4242 雙通道、14 位元、65-MSPS 類比轉數位轉換器評估模組
The ADS4242EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4242 device, an extremely low power dual channel 14-bit 65 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
使用指南: PDF
開發板
ADS4245EVM — ADS4245 雙通道、14 位元、125-MSPS 類比轉數位轉換器評估模組
The ADS4245EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4245 device, an extremely low power dual channel 14-bit 125 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
使用指南: PDF
開發板
ADS4249EVM — ADS4249 雙通道、14 位元、250-MSPS 類比轉數位轉換器評估模組
The ADS4249EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4249 device, an extremely low power dual channel 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
使用指南: PDF
開發板
ADS5482EVM — ADS5482 16 位元、105-MSPS 類比轉數位轉換器評估模組
ADS5482EVM 是能讓設計人員評估德州儀器 (TI) ADS5482 裝置的電路板，這是具有 DDR LVDS 輸出的 16 位 105 MSPS ADC。借助提供的邏輯分析器分接板，可以使用 Agilent E5405A 或 Tektronix P6980 非接觸式探頭直接擷取 ADC LVDS 輸出。ADS5482EVM 還與 TI 的 TSW1400EVM 或 TSW1405EVM 高速 LVDS 評估和擷取系統相容，允許擷取樣本並將其傳遞到 PC，以進行快速分析和評估。
ADS5482EVM 還包括德州儀器 (TI) 的新款 10 輸出低抖動時鐘同步器和抖動消除器裝置 - (...)
使用指南: PDF
開發板
ADS5484EVM — ADS5484 16 位元、170-MSPS 類比轉數位轉換器評估模組
ADS5484EVM 是能讓設計人員評估德州儀器 (TI) ADS5484 裝置的電路板，具有 DDR LVDS 輸出的 16 位元 170 MSPS ADC。借助提供的邏輯分析器分接板，可以使用 Agilent E5405A 或 Tektronix P6980 非接觸式探頭直接擷取 ADC LVDS 輸出。
ADS5484EVM 還與 TI 的 TSW1200EVM 高速 LVDS 評估和擷取系統相容，允許擷取樣本，並將其傳遞到 PC，以進行快速分析和評估。ADS5484EVM 還包括德州儀器 (TI) 的新款 10 輸出低抖動時鐘同步器和抖動消除器裝置 - CDCE72010，可用於驅動 (...)
使用指南: PDF
開發板
ADS58C28EVM — ADS58C28 雙通道、11 位元、200-MSPS 類比轉數位轉換器評估模組
ADS58C28EVM 是能讓設計人員評估德州儀器 (TI) ADS58C28 裝置 (具有 SNRBoost 技術的雙通道 11 位元 200 MSPS 類比轉換器) 性能的電路板。ADC EVM 具有 DDR LVDS 資料輸出，與 TI 的 TSW1200 資料擷取卡相容，可進行快速評估。EVM 提供了可在各種時鐘、輸入和電源條件下測試 ADS58C28 的靈活環境。
評估模組的設計是在轉換器的四個輸入，每個輸入都有背對背高頻寬平衡不平衡轉換器。如此即可將廣泛的單端輸入訊號掃頻輸入至 ADC 的任何通道。 ADS58C28EVM 也與 FMC-ADC- 轉接器和 (...)
使用指南: PDF
開發板
DAC5688EVM — DAC5688 評估模組
The DAC5688EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x/8x interpolation filters, on-board clock multiplier and PLL, 32-bit NCO and (...)
使用指南: PDF
開發板
TSW3085EVM — 寬頻發射訊號鏈評估板和參考設計
The TSW3085 Evalutaion Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B (formally National Semiconductor) low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit (...)
使用指南: PDF
計算工具
SCAC104 — CDCE72010 PLL Loop Filter Calculator
支援產品和硬體
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。