產品詳細資料

Function Counter Bits (#) 12 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Function Counter Bits (#) 12 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm)
  • Medium-speed operation
  • Fully static operation
  • Buffered inputs and outputs
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • Fully static operation
  • Common reset
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):
         1 V at VDD = 5 V
         2 V at VDD = 10 V
         2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Control counters
    • Timers
    • Frequency dividers
    • Time-delay circuits

CD4020B - 14 Stage
CD4024B - 7 Stage
CD4040B - 12 Stage

  • Medium-speed operation
  • Fully static operation
  • Buffered inputs and outputs
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • Fully static operation
  • Common reset
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range):
         1 V at VDD = 5 V
         2 V at VDD = 10 V
         2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Control counters
    • Timers
    • Frequency dividers
    • Time-delay circuits

CD4020B - 14 Stage
CD4024B - 7 Stage
CD4040B - 12 Stage

CD4020B, CD4024B, and CD4040B are ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

The CD4020B and CD4040B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4040B type also is supplied in 16-lead small-outline packages (M and M96 suffixes).

The CD4024B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4020B, CD4024B, and CD4040B are ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

The CD4020B and CD4040B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4040B type also is supplied in 16-lead small-outline packages (M and M96 suffixes).

The CD4024B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 CD4020B, CD4024B, CD4040B TYPES datasheet (Rev. D) 2003/12/11

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TSSOP (PW) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
PDIP (N) 16 Ultra Librarian

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