TPS720

활성

350mA, 낮은 VIN(1.1-V), 높은 PSRR, 저 IQ, 저손실 전압 레귤레이터(활성화)

지금 주문하기

데이터 시트

document-pdfAcrobat TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin datasheet (Rev. E) (영어) PDF | HTML

TPS720

활성

데이터 시트

지금 주문하기

제품 상세 정보

Rating

Catalog

Vin (max) (V)

4.5

Vin (min) (V)

1.1

Iout (max) (A)

0.35

Output options

Fixed Output

Vout (max) (V)

1.8

Vout (min) (V)

0.9

Fixed output options (V)

0.9, 1, 1.02, 1.05, 1.1, 1.15, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3

Noise (µVrms)

48

PSRR at 100 KHz (dB)

55

Iq (typ) (mA)

0.038

Features

Enable

Thermal resistance θJA (°C/W)

67

Load capacitance (min) (µF)

2.2

Regulated outputs (#)

1

Accuracy (%)

2

Dropout voltage (Vdo) (typ) (mV)

110

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Vin (max) (V)

4.5

Vin (min) (V)

1.1

Iout (max) (A)

0.35

Output options

Fixed Output

Vout (max) (V)

1.8

Vout (min) (V)

0.9

Fixed output options (V)

0.9, 1, 1.02, 1.05, 1.1, 1.15, 1.2, 1.3, 1.32, 1.5, 1.7, 1.8, 2.3

Noise (µVrms)

48

PSRR at 100 KHz (dB)

55

Iq (typ) (mA)

0.038

Features

Enable

Thermal resistance θJA (°C/W)

67

Load capacitance (min) (µF)

2.2

Regulated outputs (#)

1

Accuracy (%)

2

Dropout voltage (Vdo) (typ) (mV)

110

Operating temperature range (°C)

-40 to 125

WSON (DRV)

6

4 mm² (2 mm × 2 mm)

DSBGA (YZU)

5

2.02 mm² (— mm × — mm)

350-mA High-Performance LDO
Low Quiescent Current: 38 µA
Excellent Load Transient Response:
±15 mV for I_LOAD = 0 mA to 350 mA in 1 µs
Excellent Line Transient Response:
ΔV_OUT = ±2 mV for ΔV_BIAS = ±600 mV in 1 µs
ΔV_OUT = ±200 µV for ΔV_IN = ±400 mV in 1 µs
Low Noise: 48 µV_RMS (10 Hz to 100 kHz)
80 dB V_IN PSRR (10 Hz to 10 kHz)
70 dB V_BIAS PSRR (10 Hz to 10 kHz)
Fast Start-Up Time: 140 µs
Built-In Soft-Start With Monotonic V_OUT Rise and Start-Up Current Limited to 100 mA + I_LOAD
Overcurrent and Thermal Protection
Low Dropout: 110 mV at I_LOAD = 350 mA
Stable with 2.2-µF Output Capacitor
Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages

350-mA High-Performance LDO
Low Quiescent Current: 38 µA
Excellent Load Transient Response:
±15 mV for I_LOAD = 0 mA to 350 mA in 1 µs
Excellent Line Transient Response:
ΔV_OUT = ±2 mV for ΔV_BIAS = ±600 mV in 1 µs
ΔV_OUT = ±200 µV for ΔV_IN = ±400 mV in 1 µs
Low Noise: 48 µV_RMS (10 Hz to 100 kHz)
80 dB V_IN PSRR (10 Hz to 10 kHz)
70 dB V_BIAS PSRR (10 Hz to 10 kHz)
Fast Start-Up Time: 140 µs
Built-In Soft-Start With Monotonic V_OUT Rise and Start-Up Current Limited to 100 mA + I_LOAD
Overcurrent and Thermal Protection
Low Dropout: 110 mV at I_LOAD = 350 mA
Stable with 2.2-µF Output Capacitor
Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The V_BIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through V_IN, which can be a lower voltage than V_BIAS; it can be as low as V_OUT + V_DO, increasing the efficiency of the solution in many power-sensitive applications. For example, V_IN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from V_BIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic V_OUT rise (overshoot limited to 3%) with V_IN inrush current limited to 100 mA + I_LOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
T_J = –40°C to 125°C.

The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.

The V_BIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through V_IN, which can be a lower voltage than V_BIAS; it can be as low as V_OUT + V_DO, increasing the efficiency of the solution in many power-sensitive applications. For example, V_IN can be an output of a high-efficiency, DC-DC step-down regulator.

The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from V_BIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.

The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic V_OUT rise (overshoot limited to 3%) with V_IN inrush current limited to 100 mA + I_LOAD with an output capacitor of 2.2 µF.

The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
T_J = –40°C to 125°C.

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기타 선형 및 저손실(LDO) 레귤레이터 찾기

다운로드 스크립트와 함께 비디오 보기 비디오

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TPS7A10

활성

300mA, 낮은 VIN(0.75), 초저 IQ, 저손실 전압 레귤레이터(활성화 지원) 300-mA, low-IQ, fixed-output LDO regulator that supports lower input/output voltages & provides ultra-low dropout

기술 자료

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10개 모두 보기

상위 문서	유형	직함	형식 옵션	날짜
*	데이터 시트	TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin datasheet (Rev. E)	PDF \| HTML	2015. 9. 30
	애플리케이션 노트	LDO Noise Demystified (Rev. B)	PDF \| HTML	2020. 8. 18
	애플리케이션 노트	A Topical Index of TI LDO Application Notes (Rev. F)		2019. 6. 27
	선택 가이드	Low Dropout Regulators Quick Reference Guide (Rev. P)		2018. 3. 21
	애플리케이션 노트	LDO PSRR Measurement Simplified (Rev. A)	PDF \| HTML	2017. 8. 9
	애플리케이션 노트	Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs		2010. 3. 26
	아날로그 디자인 학술지	Taming linear-regulator inrush currents		2009. 5. 1
	아날로그 디자인 학술지	Q2 2009 Issue Analog Applications Journal		2009. 5. 1
	사용 설명서	TPS720xx		2008. 8. 19
	애플리케이션 노트	Inrush Current Limit in the TPS720xx		2008. 6. 6

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TPS720105DRVEVM — TPS720105 DRV 패키지의 LDO 선형 레귤레이터 평가 모듈

The TPS720105DRVEVM is a fully assembled and tested circuit for evaluating the TPS720105 low-dropout linear regulator in the DRV (2mm x 2mm SON-6) package.

사용 설명서: PDF

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이용할 수 없음

시뮬레이션 모델

TPS720 PSpice Transient Model

SBVM248.ZIP (21 KB) - PSpice 모델

지원되는 제품 및 하드웨어

패키지	핀	CAD 기호, 풋프린트 및 3D 모델
WSON (DRV)	6	Ultra Librarian
DSBGA (YZU)	5	Ultra Librarian

TPS720

350mA, 낮은 VIN(1.1-V), 높은 PSRR, 저 IQ, 저손실 전압 레귤레이터(활성화)

TPS720

제품 상세 정보

관심 가지실만한 유사 제품

비교 대상 장치와 유사한 기능.

기술 자료

설계 및 개발

TPS720105DRVEVM — TPS720105 DRV 패키지의 LDO 선형 레귤레이터 평가 모듈

TIDA-00204 — EMI/EMC 준수, 산업용 온도, 듀얼 포트 기가비트 이더넷 PHY 레퍼런스 설계

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

비디오 시리즈

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