TPS51100
- Input Voltage Range: 4.75 V to 5.25 V
- VLDOIN Voltage Range: 1.2 V to 3.6 V
- 3-A Sink/Source Termination Regulator
Includes Droop Compensation - Requires Only 20-μF Ceramic Output
Capacitance - Supports Hi-Z in S3 and Soft-Off in S5
- 1.2-V Input (VLDOIN) Helps Reduce Total
Power Dissipation - Integrated Divider Tracks 0.5 VDDQSNS for
VTT and VTTREF - Remote Sensing (VTTSNS)
- ±20-mV Accuracy for VTT and VTTREF
- 10-mA Buffered Reference (VTTREF)
- Built-In Soft-Start, UVLO, and OCL
- Thermal Shutdown
- Supports JEDEC Specifications
The TPS51100 is a 3-A, sink/source tracking termination regulator. The device is specifically designed for low-cost and low-external component count systems where space is a premium.
The TPS51100 maintains fast transient response, only requiring 20 µF (2 × 10 µF) of ceramic output capacitance. The TPS51100 supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The part also supports DDR3 VTT termination with VDDQ at 1.5 V (typical). In addition, the TPS51100 includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The TPS51100 is available in the thermally efficient 10-pin MSOP PowerPAD™ package and is specified from 40°C to 85°C.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | TPS51100 3-A Sink / Source DDR Termination Regulator datasheet (Rev. E) | PDF | HTML | 2014. 12. 17 | |
| 애플리케이션 노트 | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020. 8. 18 | ||
| 애플리케이션 노트 | DDR VTT Power Solutions: A Competitive Analysis (Rev. A) | 2020. 7. 9 | |||
| 선택 가이드 | Power Management Guide 2018 (Rev. R) | 2018. 6. 25 | |||
| 애플리케이션 노트 | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017. 8. 9 | ||
| 사용 설명서 | Using the TPS51100 | 2004. 7. 13 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
TPS51116EVM-001 — TPS51116 메모리 전원 솔루션, 동기 벅 컨트롤러 평가 모듈
The TPS51116EVM evaluation module (EVM) is a dual-output converter for DDR and DDRII memory modules. It uses a 10 A synchronous buck converter to provide the core voltage (VDDQ) for DDR memory modules. The EVM is designed to use a 4.5 V to 28 V supply voltage and a 4.75 V to (...)
TPS51100 TINA-TI Average Sink Reference Design (Rev. A)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| HVSSOP (DGQ) | 10 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.