제품 상세 정보

Number of ADC channels 2 Sampling rate (max) (kHz) 96 Analog inputs 3 Control interface I2C Digital audio interface DSP, I2S, L, PCM, R, TDM THD+N (dB) -90 ADC SNR (typ) (dB) 92 Rating Catalog Operating temperature range (°C) -40 to 85 Analog outputs 0
Number of ADC channels 2 Sampling rate (max) (kHz) 96 Analog inputs 3 Control interface I2C Digital audio interface DSP, I2S, L, PCM, R, TDM THD+N (dB) -90 ADC SNR (typ) (dB) 92 Rating Catalog Operating temperature range (°C) -40 to 85 Analog outputs 0
DSBGA (YZH) 16 5.0625 mm² 2.25 x 2.25
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Standard
    Modes
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation, or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Three Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be Driven Hi-Z for Easy Interoperability
      With Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.6 V–3.6 V.
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH
    Wafer Chip Scale Package (WCSP)
  • APPLICATIONS
    • Wireless Handsets
    • Portable Low-Power Audio Systems
    • Noise Cancellation Systems
    • Front-End Voice or Audio Processor for Digital
      Audio

All other trademarks are the property of their respective owners

  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Standard
    Modes
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation, or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Three Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be Driven Hi-Z for Easy Interoperability
      With Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.6 V–3.6 V.
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH
    Wafer Chip Scale Package (WCSP)
  • APPLICATIONS
    • Wireless Handsets
    • Portable Low-Power Audio Systems
    • Noise Cancellation Systems
    • Front-End Voice or Audio Processor for Digital
      Audio

All other trademarks are the property of their respective owners

The TLV320ADC3001 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via I2C, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3001 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3001 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via I2C, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3001 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

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기술 자료

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4개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet TLV320ADC3001 Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets and Portable Audio datasheet (Rev. D) PDF | HTML 2015/08/31
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019/06/27
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 2012/01/25
Application note Interfacing an I2S Device to an MSP430 Device (Rev. A) 2010/03/22

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

IDE, 구성, 컴파일러 또는 디버거

PUREPATHSTUDIO PurePath™ Studio graphical development environment

PurePath™ Studio Graphical Development Environment is a powerful, easy-to-use tool designed specifically to simplify software development for Audio products with a miniDSP/ Audio Processing capability.

The GDE permits these devices to be programmed to support the processing requirements of a wide (...)

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계산 툴

COEFFICIENT-CALC Coefficient Calculator For Digital Biquad Filters

COEFFICIENT-CALC (TIBQ) calculates the coefficients for the digital filter biquad transfer function implemented in TI audio codecs. The characteristics of the digital filter are adjusted by selecting a filter type and moving a control point within a window that shows the transfer function gain and (...)

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SLAR163 Audio CODEC/ADC PLL Calculator

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시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 착수하기 (...)
패키지 CAD 기호, 풋프린트 및 3D 모델
DSBGA (YZH) 16 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

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