홈 마이크로컨트롤러(MCU) 및 프로세서 마이크로프로세서 및 DSP 차량용 운전자 지원 SoC
홈
마이크로컨트롤러(MCU) 및 프로세서
마이크로프로세서 및 DSP
차량용 운전자 지원 SoC

TDA2HV

활성

ADAS 애플리케이션을 위한 비디오 및 비전 가속화가 포함된 SoC 프로세서

지금 주문하기
데이터 시트
정오표

TDA2HV

활성
데이터 시트 지금 주문하기

제품 상세 정보

CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 750 Coprocessors 4 Arm Cortex-M4 Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 750 Coprocessors 4 Arm Cortex-M4 Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Embedded vision engines, Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCBGA (ABC) 760 529 mm² 23 x 23
  • Architecture designed for ADAS applications
  • Video, image, and gaphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Orocessing Units (IPU)
  • Vision acceleration pac
    • Up to four Embedded Vision Engines (EVEs)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • 2-port gigabit ethernet (GMAC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • PCI-Express® 3.0 port with integrated PHY
    • One 2-lane gen2-compliant port
    • or two 1-lane gen2-compliant ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Five Inter-Integrated Circuit (I2C) ports
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC®/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRSM)
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-Pin BGA (ABC)
  • Architecture designed for ADAS applications
  • Video, image, and gaphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Dual Arm® Cortex®-A15 microprocessor subsystem
  • Up to two C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-Bit fixed-point multiplies per cycle
  • Up to 2.5MB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • Two DDR2/DDR3/DDR3L memory interface (EMIF) modules
    • Supports up to DDR2-800 and DDR3-1066
    • Up to 2GB supported per EMIF
  • Dual Arm® Cortex®-M4 Image Orocessing Units (IPU)
  • Vision acceleration pac
    • Up to four Embedded Vision Engines (EVEs)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Dual-core PowerVR® SGX544 3D GPU
  • Three Video Input Port (VIP) modules
    • Support for up to 10 multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • 2-port gigabit ethernet (GMAC)
  • Enhanced Direct Memory Access (EDMA) controller
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • PCI-Express® 3.0 port with integrated PHY
    • One 2-lane gen2-compliant port
    • or two 1-lane gen2-compliant ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Five Inter-Integrated Circuit (I2C) ports
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • Three high-speed USB 2.0 dual-role devices
  • Four Multimedia Card/Secure Digital/Secure Digital Input Output interfaces (MMC®/SD®/SDIO)
  • Up to 247 General-Purpose I/O (GPIO) pins
  • Real-Time Clock SubSystem (RTCSS)
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG® lock
    • Secure keys
    • Secure ROM and boot
  • Power, Reset, and Clock Management (PRSM)
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm pitch, 760-Pin BGA (ABC)

TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2x SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm® Cortex®-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

The TDA2x ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2x System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2x family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2x SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.

The TDA2x SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm® Cortex®-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2x SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.

The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

The TDA2x ADAS processor is qualified according to the AEC-Q100 standard.
filter 기타 차량용 운전자 지원 SoC 찾기
다운로드 스크립트와 함께 비디오 보기 비디오
추가 정보 요청

이 제품군은 대량 자동차 제조업체가 사용할 수 있습니다. 자세한 내용은 TI 판매 담당자에 문의하십시오.

고급 운전자 지원 시스템(ADAS)용 TDAx SoC에 대해 자세히 알아보십시오.

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
36개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0 datasheet (Rev. F) PDF | HTML 2019/06/06
* Errata TDA2x ADAS Applications Processor (Rev. K) PDF | HTML 2024/09/08
Application note Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 2021/05/05
Application note IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 2020/08/24
White paper Paving the way to self-driving cars with ADAS (Rev. A) 2020/07/24
White paper Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) 2020/07/24
User guide TDA2x ADAS Applications Processor Public Technical Reference Manual (Rev. G) 2020/02/22
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 2020/01/06
Application note Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 2019/06/11
Application note TDA2x/TDA2E Performance (Rev. A) PDF | HTML 2019/06/10
Application note The Implementation of YUV422 Output for SRV 2018/08/02
Application note MMC DLL Tuning (Rev. B) 2018/07/31
Application note Integrating AUTOSAR on TI SoC: Fundamentals 2018/06/18
Application note ECC/EDC on TDAxx (Rev. B) 2018/06/13
Application note Sharing VPE Between VISIONSDK and PSDKLA 2018/05/04
Application note TMS320C66x XMC Memory Protection 2018/01/31
Application note DSS Bit Exact Output (Rev. A) 2018/01/12
Application note Flashing Utility - mflash 2018/01/09
White paper Embedded low-power deep learning with TIDL 2017/12/08
Application note Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 2017/11/07
Application note A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 2017/11/03
Application note DSS BT656 Workaround for TDA2x (Rev. A) 2017/11/03
Functional safety information Safety Features on VisionSDK 2017/10/26
Application note Optimization of GPU-Based Surround View on TI’s TDA2x SoC 2017/09/12
White paper Step into next-gen architectures for multi-camera operations in automobiles 2017/06/16
White paper Making Cars Safer Through Technology Innovation (Rev. A) 2017/06/07
Application note Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 2016/12/15
Application note Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) 2016/08/23
Application note ADAS Power Management 2016/03/07
White paper Multicore SoCs stay a step ahead of SoC FPGAs 2016/02/23
User guide Vision Application Board User's Guide 2016/02/09
White paper Surround view camera systems for ADAS (Rev. A) 2015/10/20
Application note Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 2014/08/13
White paper TI Vision SDK, Optimized Vision Libraries for ADAS Systems 2014/04/14
White paper TI Gives Sight to Vision-Enabled Automotive Technologies 2013/10/16
White paper Empowering Automotive Vision with TI’s Vision AccelerationPac 2013/10/13

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

개발 키트

D3-3P-RVP-TDA2X — TDA2 프로세서용 D3 임베디드 DesignCore® RVP-TDA2x 개발 키트

RVP-TDA2x는 하이엔드 ADAS 시스템을 위한 다중 카메라 플랫폼입니다. ARM A15 애플리케이션 프로세서 2개, 최대 4개의 EVE(Vision Acceleration PAC) 코프로세서, 하드웨어 가속 H.264 인코더가 포함되어 있습니다. 개발 키트는 8개의 카메라 입력을 지원하지만 필요에 따라 사용자 지정할 수 있습니다. 키트 구매에는 소프트웨어 배포 및 일회용 라이센스가 포함됩니다.

발송: D3 Embedded
파트너 사이트 방문
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-RADAR — RTOS Processor SDK for Radar

Processor SDK-Vision (Vision SDK) and Processor SDK-Radar (Radar SDK) are multi-processor software development kits for TDAx processors. The software framework allows users to create different ADAS application data flows involving radar capture, radar processing, video capture, video (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
소프트웨어 개발 키트(SDK)

PROCESSOR-SDK-VISION — Linux and RTOS Processor SDK for Vision

Processor SDK-Vision (Vision SDK) and Processor SDK-Radar (Radar SDK) are multi-processor software development kits for TDAx processors. The software framework allows users to create different ADAS application data flows involving radar capture, radar processing, video capture, video (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
다운로드 옵션
애플리케이션 소프트웨어 및 프레임워크

MOMENTA-3P-DL-ALGORITHMS — TDA4x 프로세서의 ADAS 전방 카메라 애플리케이션을 위한 Momenta 딥 러닝 알고리즘

Momenta’s deep learning based algorithms for ADAS applications make full use of the DSP cores and accelerators on TDA4x for neural network processing. Designed to achieve market leading computational and power efficiency, Momenta’s algorithms offer an array of pre- and post-imaging (...)
발송: Momenta
파트너 사이트 방문
코드 예제 또는 데모

D3-3P-DEV — AI 카메라, 하드웨어, 드라이버 및 펌웨어에 대한 D3 임베디드 지원

D3 Embedded는 미국에 본사를 둔 기업으로, 비전과 mmWave 레이더 감지, 연결, 임베디드 프로세싱, AI를 통합해 고성능 응용 분야를 위한 포괄적인 솔루션을 제작하는 전문 업체입니다. D3 Embedded는 개발 부문에서 25년 넘게 축적한 경력을 바탕으로 사용자 지정 소프트웨어와 하드웨어 개발 서비스, ISP 기반 이미지 튜닝, AI와 알고리즘, 복잡한 DSP 프로세싱 체인 개발 서비스를 제공합니다. 특히 사내 전문가로 구성된 레이더 및 DSP 팀은 텍사스 인스트루먼트의 애플리케이션별 프로세서에 적합한 맞춤형 (...)
발송: D3 Embedded
View Options
IDE, 구성, 컴파일러 또는 디버거

CCSTUDIO — Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
IDE, 구성, 컴파일러 또는 디버거

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어
시작 다운로드 옵션
운영 체제(OS)

GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
발송: Green Hills Software
파트너 사이트 방문
운영 체제(OS)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

QNX Neutrino® RTOS(실시간 운영 체제)는 자동차, 의료, 운송, 군사 및 산업용 임베디드 시스템을 위한 차세대 제품을 지원하도록 설계된 모든 기능을 갖춘 견고한 RTOS입니다. 마이크로커널 설계 및 모듈식 아키텍처를 통해 고객은 낮은 총 소유 비용으로 고도로 최적화되고 안정적인 시스템을 만들 수 있습니다.
발송: QNX
파트너 사이트 방문
시뮬레이션 모델

TDA2x BSDL Model

SPRM670.ZIP (28 KB) - BSDL Model
다운로드
시뮬레이션 모델

TDA2x IBIS Model

SPRM671.ZIP (36408 KB) - IBIS Model
다운로드
시뮬레이션 모델

TDA2x Thermal Model

SPRM672.ZIP (3 KB) - Thermal Model
다운로드
계산 툴

CLOCKTREETOOL — Sitara, 오토모티브, 비전 분석 및 디지털 신호 프로세서용 클록 트리 툴

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree (...)
사용 설명서: PDF
View Options
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
FCBGA (ABC) 760 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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