SN74LVCH8T245

활성

구성 가능한 전압 변환 및 3상 출력을 지원하는 8비트 듀얼 공급 버스 트랜시버

제품 상세 정보

Bits (#) 8 Data rate (max) (Mbps) 200 Topology Push-Pull Vout (min) (V) 1.65 Vout (max) (V) 5.5 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Prop delay (ns) 6.5 Technology family LVC Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 8 Data rate (max) (Mbps) 200 Topology Push-Pull Vout (min) (V) 1.65 Vout (max) (V) 5.5 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Prop delay (ns) 6.5 Technology family LVC Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DB) 24 63.96 mm² (8.2 mm × 7.8 mm) VQFN (RHL) 24 19.25 mm² (5.5 mm × 3.5 mm) TVSOP (DGV) 24 32 mm² (5 mm × 6.4 mm) TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm)
  • Fully configurable dual-rail design
  • Robust, glitch-free power supply sequencing
  • Control inputs (DIR and OE) VIH and VIL levels are referenced to VCCA
  • Bus hold on data inputs eliminates the need for external pullup and pulldown resistors
  • VCC isolation feature and VCC disconnect feature
    • if either VCC input is below 100mV or left floating, all I/O outputs are disabled and become high- impedance state
  • Ioff supports Partial-Power-Down node operation
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
  • Fully configurable dual-rail design
  • Robust, glitch-free power supply sequencing
  • Control inputs (DIR and OE) VIH and VIL levels are referenced to VCCA
  • Bus hold on data inputs eliminates the need for external pullup and pulldown resistors
  • VCC isolation feature and VCC disconnect feature
    • if either VCC input is below 100mV or left floating, all I/O outputs are disabled and become high- impedance state
  • Ioff supports Partial-Power-Down node operation
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22

The SN74LVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.65V to 5.5V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5.5V voltage nodes.

The SN74LVCH8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs, the A-port outputs, or place both output ports into a high-impedance state. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports are always active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device. The VCC isolation feature is designed so that if either VCCA or VCCB is at GND, then the outputs are in the high-impedance state. To put the device in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

The SN74LVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.

The SN74LVCH8T245 is an 8-bit noninverting bus transceiver that uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.65V to 5.5V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5.5V voltage nodes.

The SN74LVCH8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs, the A-port outputs, or place both output ports into a high-impedance state. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports are always active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device. The VCC isolation feature is designed so that if either VCCA or VCCB is at GND, then the outputs are in the high-impedance state. To put the device in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

The SN74LVCH8T245 is designed so that the control pins (DIR and OE) are referenced to VCCA.

다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
6개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 SN74LVCH8T245 8-BIT Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs datasheet (Rev. D) PDF | HTML 2026. 5. 29
애플리케이션 노트 Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024. 10. 2
애플리케이션 노트 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024. 7. 12
애플리케이션 노트 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024. 7. 3
선택 가이드 Voltage Translation Buying Guide (Rev. A) 2021. 4. 15
애플리케이션 노트 Designing with SN74LVCXT245 and SN74LVCHXT245 Family of Direction Controlled 2015. 10. 27

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
지원되는 제품 및 하드웨어
재고 있음
제한:
??asset.out-of-stock-ti_ko_KR??
이용할 수 없음
평가 보드

14-24-NL-LOGIC-EVM — 14핀~24핀 비 리드 패키지용 로직 제품 일반 평가 모듈

14-24-NL-LOGIC-EVM은 14핀~24핀 BQA, BQB, RGY, RSV, RJW 또는 RHL 패키지가 있는 로직 또는 변환 장치를 지원하도록 설계된 유연한 평가 모듈(EVM)입니다.

사용 설명서: PDF | HTML
지원되는 제품 및 하드웨어
재고 있음
제한:
??asset.out-of-stock-ti_ko_KR??
이용할 수 없음
평가 보드

AVCLVCDIRCNTRL-EVM — AVC 및 LVC를 지원하는 방향 제어 양방향 변환 디바이스를 위한 일반 EVM

일반 EVM은 2개, 4개 및 8개 채널 LVC 및 AVC 방향 제어 변환 장치를 지원하도록 설계했습니다. 또한 동일한 개수의 채널에서 버스 홀드 및 차량용 -Q1 장치를 지원합니다. AVC는 구동 강도가 더 낮은 12mA인 저전압 변환 장치입니다. LVC는 구동 강도가 더 높은 32mA로, 1.65~5.5V의 더 높은 전압 변환 장치입니다.

사용 설명서: PDF
지원되는 제품 및 하드웨어
재고 있음
제한:
??asset.out-of-stock-ti_ko_KR??
이용할 수 없음
시뮬레이션 모델

SN74LVCH8T245 IBIS Model

SCEM493.ZIP (55 KB) - IBIS 모델
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
SSOP (DB) 24 Ultra Librarian
VQFN (RHL) 24 Ultra Librarian
TVSOP (DGV) 24 Ultra Librarian
TSSOP (PW) 24 Ultra Librarian

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상