SN74HCT595

활성

TLL 호환 CMOS 입력 및 3상태 출력 레지스터에 대한 8비트 시프트 레지스터

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데이터 시트

document-pdfAcrobat SN74HCT595 8-Bit Shift Registers with 3-State Output Registers datasheet (Rev. A) (영어) PDF | HTML

SN74HCT595

활성

지금 주문하기

제품 상세 정보

Configuration

Serial-in, Parallel-out

Bits (#)

8

Technology family

HCT

Input type

TTL-Compatible CMOS

Output type

3-State

Clock frequency (MHz)

25

IOL (max) (mA)

6

IOH (max) (mA)

-6

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode

Operating temperature range (°C)

-40 to 125

Rating

Catalog

Configuration

Serial-in, Parallel-out

Bits (#)

8

Technology family

HCT

Input type

TTL-Compatible CMOS

Output type

3-State

Clock frequency (MHz)

25

IOL (max) (mA)

6

IOH (max) (mA)

-6

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode

Operating temperature range (°C)

-40 to 125

Rating

Catalog

TSSOP (PW)

16

32 mm² (5 mm × 6.4 mm)

LSTTL input logic compatible
- V_IL(max) = 0.8 V, V_IH(min) = 2 V
CMOS input logic compatible
- I_I ≤ 1 µA at V_OL, V_OH
4.5 V to 5.5 V operation
Supports fanout up to 10 LSTTL loads
Shift register has direct clear
Extended ambient temperature range: –40°C to +125°C, T_A

LSTTL input logic compatible
- V_IL(max) = 0.8 V, V_IH(min) = 2 V
CMOS input logic compatible
- I_I ≤ 1 µA at V_OL, V_OH
4.5 V to 5.5 V operation
Supports fanout up to 10 LSTTL loads
Shift register has direct clear
Extended ambient temperature range: –40°C to +125°C, T_A

The SN74HCT595 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (Q_H’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (Q_H’) are not impacted by the operation of the OE input.