SN74AVCB164245

Name: SN74AVCB164245
Brand: TI
SKU: SN74AVCB164245
Price: 1.711 USD

활성

16비트 듀얼 공급 버스 트랜시버(구성 포함) Xlation 및 3상 출력

지금 주문

데이터 시트

document-pdfAcrobat SN74AVCB164245 datasheet (Rev. D) (영어)

SN74AVCB164245

활성

데이터 시트

지금 주문

제품 상세 정보

Bits (#)

16

Data rate (max) (Mbps)

380

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.4

Vin (max) (V)

3.6

Vout (max) (V)

3.6

Applications

GPIO

Features

Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

2.5

Technology family

AVC

Supply current (max) (mA)

0.08

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Bits (#)

16

Data rate (max) (Mbps)

380

Topology

Push-Pull

Direction control (typ)

Direction-controlled

Vin (min) (V)

1.4

Vin (max) (V)

3.6

Vout (max) (V)

3.6

Applications

GPIO

Features

Output damping resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff)

Prop delay (ns)

2.5

Technology family

AVC

Supply current (max) (mA)

0.08

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

TVSOP (DGV)

48

62.08 mm² 9.7 x 6.4

Member of the Texas Instruments Widebus™ Family
DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
Dynamic Drive Capability Is Equivalent to Standard Outputs With I_OH and I_OL of ±24 mA at 2.5-V V_CC
Control Inputs V_IH/V_IL Levels Are Referenced to V_CCB Voltage
If Either V_CC Input Is at GND, Both Ports Are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
I_off Supports Partial-Power-Down Mode Operation
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.4-V to 3.6-V Power-Supply Range
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus, DOC are trademarks of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
Dynamic Drive Capability Is Equivalent to Standard Outputs With I_OH and I_OL of ±24 mA at 2.5-V V_CC
Control Inputs V_IH/V_IL Levels Are Referenced to V_CCB Voltage
If Either V_CC Input Is at GND, Both Ports Are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
I_off Supports Partial-Power-Down Mode Operation
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.4-V to 3.6-V Power-Supply Range
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus, DOC are trademarks of Texas Instruments.

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V_CCB.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either V_CC input is at GND, both ports are in the high-impedance state.

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCB164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.

The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V_CCB.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CCB through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either V_CC input is at GND, both ports are in the high-impedance state.

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18개 모두 보기

	유형	직함		날짜
*	Data sheet	SN74AVCB164245 datasheet (Rev. D)		2005/05/31
	Application note	Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators	PDF \| HTML	2024/10/02
	Application note	Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators	PDF \| HTML	2024/07/12
	Application note	Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)	PDF \| HTML	2024/07/03
	Selection guide	Voltage Translation Buying Guide (Rev. A)		2021/04/15
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	Application note	Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)		2015/04/30
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004/06/22
	More literature	LCD Module Interface Application Clip		2003/05/09
	User guide	AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C)		2002/08/20
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		2002/05/22
	Application note	Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)		1999/07/07
	Application note	AVC Logic Family Technology and Applications (Rev. A)		1998/08/26
	Selection guide	Logic Guide (Rev. AC)	PDF \| HTML	1994/06/01

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