SN74AUC00

활성

4채널, 2입력, 0.8V~2.7V 고속 NAND 게이트

지금 주문하기

데이터 시트

document-pdfAcrobat SN74AUC00 datasheet (Rev. A) (영어)

SN74AUC00

활성

데이터 시트

지금 주문하기

제품 상세 정보

Technology family

AUC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-8

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-8

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

VQFN (RGY)

12.25 mm² (3.5 mm × 3.5 mm)

Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 2 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 2 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

This quadruple 2-input positive-NAND gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This quadruple 2-input positive-NAND gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

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SN74AHC00

활성

4채널, 2입력, 2V~5.5V NAND 게이트 Voltage range 2V to 5.5V, average propagation delay 12ns, average drive strength 9mA

기술 자료

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2개 모두 보기

상위 문서	유형	직함	형식 옵션	최신 영어 버전 다운로드	날짜
*	데이터 시트	SN74AUC00 datasheet (Rev. A)			2005. 3. 28
	기술 문서	It’s all in the family: a brief guide to logic family selection	PDF \| HTML		2015. 9. 10