MSPM0G3218-Q1

미리 보기

256KB 듀얼 뱅크 플래시, 32KB SRAM, ADC, COMP, MATHACL, CAN을 지원하는 차량용 80MHz Arm® Cortex®-M0+ MCU

제품 상세 정보

CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 256 RAM (kByte) 32 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 4 CAN (#) CAN-FD TI functional safety category Functional Safety-Compliant Number of ADC channels 9, 11, 15, 19, 21, 27 SPI 2 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Nonvolatile memory (kByte) 256 Number of GPIOs 16, 20, 24, 28, 44, 60 Number of I2Cs 2 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 256 RAM (kByte) 32 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 4 CAN (#) CAN-FD TI functional safety category Functional Safety-Compliant Number of ADC channels 9, 11, 15, 19, 21, 27 SPI 2 Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Hardware accelerators Trigonometric math accelerator Nonvolatile memory (kByte) 256 Number of GPIOs 16, 20, 24, 28, 44, 60 Number of I2Cs 2 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
LQFP (PM) 64 144 mm² 12 x 12 LQFP (PT) 48 81 mm² 9 x 9 VQFN (RGZ) 48 49 mm² 7 x 7 VQFN (RHB) 32 25 mm² 5 x 5
  • AEC-Q100 qualified for automotive applications
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications

    • Documentation to aid ISO 26262 system design will be available
    • Systematic capability up to ASIL B planned

  • PSA-L1 Certification planned
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 256KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates
    • 8KB data flash bank with ECC protection
    • 32KB total SRAM with ECC protection or hardware parity
  • High-performance analog peripherals
    • Up to two simultaneous sampling 12-bit 1.6Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 100ksps with hardware averaging
    • Up to two high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • Programmable analog connections between ADC and COMP
    • Two voltage references (VREF)

      • Configurable 1.4V or 2.5V internal shared voltage reference with external VREF capacitor

      • Configurable 1.4V or 2.5V internal only voltage reference without external VREF capacitor

    • Integrated temperature sensor
  • Optimized low-power modes (estimates for early samples)
    • RUN: 104µA/MHz (CoreMark)
    • SLEEP: 614uA at 4MHz
    • STOP: 56µA at 32kHz
    • STANDBY: 1.4µA at 32kHz with RTC and SRAM state retention
    • SHUTDOWN: 69nA with IO wake-up capability
  • Intelligent digital peripherals
    • 9-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Five timers support up to 18 PWM channels
      • One 16-bit general-purpose timers support QEI
      • Two 16-bit general-purpose timers support low-power operation in STANDBY mode
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two basic software timers including 4 independent configurable 16-bit counters each

      • Ability to daisy-chain 2 of the 16-bit counters to form a 32-bit counter

      • Ability to generate 2x interrupt driven PWMs per basic software timer

    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Five configurable serial interfaces (UNICOMM)

      • One configurable serial interface supporting UART or SPI
      • One configurable serial interfaces supporting UART (with LIN) or I2C (controller or target mode)

      • One configurable serial interfaces supporting UART or I2C (controller or target mode)

      • One dedicated UART + LIN interface

      • One dedicated SPI interface up to 32Mbits/s

      • One Controller Area Network (CAN) interface supporting CAN 2.0 A or B and CAN-FD

  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 60 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
    • 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
    • 28-pin VSSOP (28DGS) (0.5mm pitch)

    • 24-pin VQFN (RGE) (0.5mm pitch, wettable flank)

    • 20-pin VQFN (20DGS) (0.5mm pitch)

  • Family members (also see Device Comparison)
    • MSPM0G3218-Q1: 256KB flash, 32KB RAM, 8 KB Databank, 2x ADC, 2x COMP, 1x CAN-FD
    • MSPM0G3207-Q1: 128KB flash, 32KB RAM, 8 KB Databank, 1x ADC, 1x COMP, 1x CAN-FD

  • Development kits and software (also see Tools and Software)
  • AEC-Q100 qualified for automotive applications
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications

    • Documentation to aid ISO 26262 system design will be available
    • Systematic capability up to ASIL B planned

  • PSA-L1 Certification planned
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 256KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates
    • 8KB data flash bank with ECC protection
    • 32KB total SRAM with ECC protection or hardware parity
  • High-performance analog peripherals
    • Up to two simultaneous sampling 12-bit 1.6Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 100ksps with hardware averaging
    • Up to two high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • Programmable analog connections between ADC and COMP
    • Two voltage references (VREF)

      • Configurable 1.4V or 2.5V internal shared voltage reference with external VREF capacitor

      • Configurable 1.4V or 2.5V internal only voltage reference without external VREF capacitor

    • Integrated temperature sensor
  • Optimized low-power modes (estimates for early samples)
    • RUN: 104µA/MHz (CoreMark)
    • SLEEP: 614uA at 4MHz
    • STOP: 56µA at 32kHz
    • STANDBY: 1.4µA at 32kHz with RTC and SRAM state retention
    • SHUTDOWN: 69nA with IO wake-up capability
  • Intelligent digital peripherals
    • 9-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Five timers support up to 18 PWM channels
      • One 16-bit general-purpose timers support QEI
      • Two 16-bit general-purpose timers support low-power operation in STANDBY mode
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two basic software timers including 4 independent configurable 16-bit counters each

      • Ability to daisy-chain 2 of the 16-bit counters to form a 32-bit counter

      • Ability to generate 2x interrupt driven PWMs per basic software timer

    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Five configurable serial interfaces (UNICOMM)

      • One configurable serial interface supporting UART or SPI
      • One configurable serial interfaces supporting UART (with LIN) or I2C (controller or target mode)

      • One configurable serial interfaces supporting UART or I2C (controller or target mode)

      • One dedicated UART + LIN interface

      • One dedicated SPI interface up to 32Mbits/s

      • One Controller Area Network (CAN) interface supporting CAN 2.0 A or B and CAN-FD

  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 60 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
    • 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
    • 28-pin VSSOP (28DGS) (0.5mm pitch)

    • 24-pin VQFN (RGE) (0.5mm pitch, wettable flank)

    • 20-pin VQFN (20DGS) (0.5mm pitch)

  • Family members (also see Device Comparison)
    • MSPM0G3218-Q1: 256KB flash, 32KB RAM, 8 KB Databank, 2x ADC, 2x COMP, 1x CAN-FD
    • MSPM0G3207-Q1: 128KB flash, 32KB RAM, 8 KB Databank, 1x ADC, 1x COMP, 1x CAN-FD

  • Development kits and software (also see Tools and Software)

MSPM0G3218-Q1 and MSPM0G3207-Q1 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 128KB to 256KB of flash memory in packages ranging from 24 to 64 pins. These devices include CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 256KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB SRAM (with ECC and parity protection). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 1.6Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), and two comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs.

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G3218-Q1 and MSPM0G3207-Q1 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

MSPM0G3218-Q1 and MSPM0G3207-Q1 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 128KB to 256KB of flash memory in packages ranging from 24 to 64 pins. These devices include CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 256KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB SRAM (with ECC and parity protection). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 1.6Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), and two comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs.

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G3218-Q1 and MSPM0G3207-Q1 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

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상위 문서 유형 직함 형식 옵션 날짜
* Data sheet MSPM0G3218-Q1 and MSPM0G3207-Q1 Mixed-Signal Microcontroller With CAN-FD Interface datasheet PDF | HTML 2026/03/16
* Errata MSPM0G321x/MSPM0G320x Mixed-Signal Microcontrollers Errata PDF | HTML 2026/02/13
* User guide MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. D) 2026/03/20

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LP-MSPM0G3218 — MSPM0G3218 LaunchPad™ development kit evaluation module

The LP-MSPM0G3218 LaunchPad™ development kit is an easy-to-use evaluation module (EVM) based on the MSPM0G3218. It contains everything needed to start developing on the MSPM0G3218 M0+ MCU platform, including on-board debug probe for programming, debugging and energy measurements. The board (...)
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소프트웨어 개발 키트(SDK)

MSPM0-SDK MSPM0 Software Development Kit (SDK)

The MSPM0 SDK provides the ultimate collection of software, tools and documentation to accelerate the development of applications for the MSPM0 MCU platform under a single software package.

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평가 모듈(EVM)용 GUI

LP-MSPM0G3507-OOBE Out-of-box experience GUI for LP-MSPM0G3507

Out-of-box experience GUI for LP-MSPM0G3507
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평가 모듈(EVM)용 GUI

MSPM0-ANALOG-CONFIGURATOR Analog Configurator for MSPM0

The MSPM0 analog configurator is a graphical configuration tool designed to simplify and accelerate the design and enablement of an analog signal chain using a MSPM0 device with no traditional coding development necessary.

The tool uses an intuitive GUI to configure a signal chain using the high (...)

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CCSTUDIO-STARTHUB Example application browser

Explore a vast library of example projects, categorized by application type, with support for multiple development environments
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MSP-MOTOR-CONTROL MSP firmware solutions for motor control

MSP Motor Control is a collection of software, tools and examples to spin motors in 30 minutes or less with MSPM0 Arm® Cortex® M0+ MCUs and popular motor driver solutions.

MSP Motor Control provides examples for supported hardware kits to spin brushed, stepper, and three-phase motors with sensored (...)

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TI-DEVELOPER-ZONE Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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CCSTUDIO Code Composer Studio integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development tool ecosystem. It is an integrated development environment (IDE) for TI's microcontrollers, processors, wireless connectivity devices and radar sensors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize (...)

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MSP-ZERO-CODE-STUDIO Graphical development environment for designing applications for MSP microcontrollers

MSP Zero Code Studio is a visual design environment that simplifies firmware development, making it possible to configure, develop, and run microcontroller applications in minutes with zero coding and no IDE required. Available as a standalone download or on the cloud.

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SYSCONFIG Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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온라인 교육

MSPM0-ACADEMY MSPM0 Academy

MSPM0 Academy delivers easy-to-use training modules that span a wide range of topics and LaunchPads in the MSPM0 MCU portfolio.
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MSP-GANG-SOFTWARE MSP-GANG Software

The MSP Gang Programmer (MSP-GANG) is a MSPM0/MSP430/MSP432 device programmer that can program up to eight identical devices at the same time.
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UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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인증

LP-MSPM0G3218-DOC-CERT LP-MSPM0G3218 EU Declaration of Conformity (DoC)

LP-MSPM0G3218 EU Declaration of Conformity (DoC)
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패키지 CAD 기호, 풋프린트 및 3D 모델
LQFP (PM) 64 Ultra Librarian
LQFP (PT) 48 Ultra Librarian
VQFN (RGZ) 48 Ultra Librarian
VQFN (RHB) 32 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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