LP3878-ADJ
- Input Supply Voltage: 2.5 V to 16V
- Output Voltage Range: 1 V to 5.5 V
- Designed for Use With Low-ESR Ceramic
Capacitors - Very Low Output Noise
- 8-Lead SO PowerPAD and WSON Surface-
Mount Packages - < 10-µA Quiescent Current in Shutdown
- Low Ground Pin Current at all Loads
- Overtemperature and Overcurrent Protection
- –40°C to 125°C Operating Junction Temperature
Range
The LP3878-ADJ is an 800-mA, adjustable output, voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1 V.
Using an optimized VIP (Vertically Integrated PNP) process, the LP3878-ADJ delivers superior performance:
- Ground Pin Current: Typically 5.5 mA at 800-mA load, and 180 µA at 100-µA load.
- Low Power Shutdown: The LP3878-ADJ draws less than 10-µA quiescent current when the SHUTDOWN pin is pulled low.
- Precision Output: Ensured output voltage accuracy is 1% at room temperature.
- Low Noise: Broadband output noise is only 18 µV (typical) with a 10-nF bypass capacitor.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | LP3878-ADJ Micropower 800-mA Low-Noise "Ceramic Stable" Adjustable Voltage Regulator for 1-V to 5-V Applications datasheet (Rev. D) | PDF | HTML | 2015. 2. 9 | |
| 애플리케이션 노트 | A Topical Index of TI LDO Application Notes (Rev. F) | 2019. 6. 27 | |||
| 선택 가이드 | Power Management Guide 2018 (Rev. R) | 2018. 6. 25 | |||
| 선택 가이드 | Low Dropout Regulators Quick Reference Guide (Rev. P) | 2018. 3. 21 | |||
| 기술 문서 | How LDOs contribute to power efficiency | PDF | HTML | 2016. 5. 13 | ||
| 사용 설명서 | AN-1409 LP3878-ADJ Evaluation Board (Rev. D) | 2013. 6. 2 | |||
| 애플리케이션 노트 | AN-2145 Power Considerations for SDI Products (Rev. B) | 2013. 4. 26 | |||
| 애플리케이션 노트 | AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) | 2013. 4. 26 | |||
| 애플리케이션 노트 | AN-1950 Silently Powering Low Noise Applications (Rev. A) | 2013. 4. 22 | |||
| 사용 설명서 | SP16130CH4RB Low IF Receiver Reference Design User Guide | 2012. 1. 27 | |||
| 사용 설명서 | High-IF Sub-sampling Receiver Subsystem User Guide | 2012. 1. 27 | |||
| 백서 | Using Power to Improve Signal-Path Performance | 2006. 8. 1 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
TIDA-00153 — 고속 ADC를 사용하는 JESD204B 링크 지연 설계
JESD204B links are the latest trend in data-converter digital interfaces. These links take advantage of high-speed serial-digital technology to offer many compelling benefits including improved channel densities. This reference design addresses one of the challenges of adopting the new interface: (...)
TIDA-00353 — JESD204B 직렬 링크의 이퀄라이제이션 최적화 레퍼런스 디자인
Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to (...)
TIDA-00360 — 16비트 ADC 및 100MHz IF 대역폭을 지원하는 700–2700MHz 듀얼 채널 수신기 레퍼런스 디자인
The increasing demand on wireless networks to provide faster data links to customers has driven transceiver hardware to increasingly demanding performance with enough bandwidth to support the largest standardized multi-carrier frequency bands (with band aggregation in some cases) and enough (...)
TIDA-00431 — 8GHz DC 커플링된 차동 증폭기를 사용하는 RF 샘플링 4GSPS ADC 레퍼런스 디자인
Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.
This reference design describes a wideband RF (...)
TIDA-00432 — Xilinx 플랫폼을 사용하여 페이즈드 어레이 레이더 시스템을 위한 JESD204B 기가 샘플 ADC 동기화
This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
TIDA-00531 — 동적 전압 스케일링 전원 공급 장치로 선형 레귤레이터 레퍼런스 디자인
The TIDA-00531 reference design features dynamic voltage scaling (DVS) as a power management solution to power CPU/DSP core voltages.
TIDA-00597 — 클록 제너레이터를 위한 저잡음 전력 솔루션 레퍼런스 디자인
The TIDA-00597 can provide very low noise output power for clock generator.
TIDA-00988 — 160MHz 대역폭 무선 신호 테스터 레퍼런스 디자인
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| HSOIC (DDA) | 8 | Ultra Librarian |
| WSON (NGT) | 8 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.