제품 상세 정보

Number of input channels 1 Resolution (Bits) 15 Sample rate (max) (Msps) 4000 Features Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed Analog input BW (MHz) 3300 SNR (dB) 59.9 Power consumption (typ) (mW) 2000 Operating temperature range (°C) -40 to 85 Rating Catalog
Number of input channels 1 Resolution (Bits) 15 Sample rate (max) (Msps) 4000 Features Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed Analog input BW (MHz) 3300 SNR (dB) 59.9 Power consumption (typ) (mW) 2000 Operating temperature range (°C) -40 to 85 Rating Catalog
VQFNP (NKE) 68 100 mm² 10 x 10
  • Excellent Noise and Linearity up to and beyond FIN = 3 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32 (Complex Baseband Out)
  • Usable Output Bandwidth of 800 MHz at
    4x Decimation and 4000 MSPS
  • Usable Output Bandwidth of 100 MHz at
    32x Decimation and 4000 MSPS
  • Low Pin-Count JESD204B Subclass 1 Interface
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications:
    • Max Sampling Rate: 4000 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex (30 bits total)
    • IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz at −13 dBFS)
    • FPBW (–3 dB): 3.2 GHz
    • Supply Voltages: 1.9 V and 1.2 V
    • Power Consumption
      • Decimate by 10 (4000 MSPS): 2 W
      • Power Down Mode: <50 mW
  • Excellent Noise and Linearity up to and beyond FIN = 3 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32 (Complex Baseband Out)
  • Usable Output Bandwidth of 800 MHz at
    4x Decimation and 4000 MSPS
  • Usable Output Bandwidth of 100 MHz at
    32x Decimation and 4000 MSPS
  • Low Pin-Count JESD204B Subclass 1 Interface
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications:
    • Max Sampling Rate: 4000 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex (30 bits total)
    • IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz at −13 dBFS)
    • FPBW (–3 dB): 3.2 GHz
    • Supply Voltages: 1.9 V and 1.2 V
    • Power Consumption
      • Decimate by 10 (4000 MSPS): 2 W
      • Power Down Mode: <50 mW

The LM15851 device is a wideband sampling and digital tuning device. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

The LM15851 device is available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.

The LM15851 device is a wideband sampling and digital tuning device. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

The LM15851 device is available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.

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상위 문서 유형 직함 형식 옵션 날짜
* Data sheet LM15851 Ultra-Wideband RF Sampling Subsystem datasheet (Rev. E) PDF | HTML 2017/10/19
Application note System solution for avionics & defense 2015/09/23
White paper Ready to make the jump to JESD204B? White Paper (Rev. B) 2015/03/19

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This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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시뮬레이션 모델

ADC12J4000 IBIS-AMI Model (Rev. A)

SLAM198A.ZIP (4134 KB) - IBIS-AMI Model
시뮬레이션 모델

LM15851 IBIS Model (Rev. A)

SLAM222A.ZIP (24 KB) - IBIS Model
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VQFNP (NKE) 68 Ultra Librarian

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