CDCEL913-Q1

활성

1.8V LVCMOS 출력을 지원하는 차량용 카탈로그 프로그래머블 1-PLL VCXO 클록 신시사이저

지금 주문하기

데이터 시트

document-pdfAcrobat CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs datasheet (Rev. E) (영어) PDF | HTML

CDCEL913-Q1

활성

데이터 시트

지금 주문하기

제품 상세 정보

Number of outputs

3

Output type

LVCMOS

Output frequency (max) (MHz)

230

Core supply voltage (V)

1.8

Output supply voltage (V)

1.8

Input type

LVCMOS, XTAL

Operating temperature range (°C)

-40 to 85

Features

I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC)

Rating

Automotive

Number of outputs

3

Output type

LVCMOS

Output frequency (max) (MHz)

230

Core supply voltage (V)

1.8

Output supply voltage (V)

1.8

Input type

LVCMOS, XTAL

Operating temperature range (°C)

-40 to 85

Features

I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC)

Rating

Automotive

TSSOP (PW)

14

32 mm² (5 mm × 6.4 mm)

Qualified for automotive applications
AEC-Q100 qualified with the following results:
- Device temperature grades
  - Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
  - Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
Functional Safety-Capable
- Documentation available to aid functional safety system design
In-system programmability and EEPROM
- Serial programmable volatile register
- Nonvolatile EEPROM to store customer settings
Flexible input clocking concept
- External crystal: 8MHz to 32MHz
- On-chip VCXO: pull range ±150ppm
- Single-ended LVCMOS up to 160MHz
Free selectable output frequency up to 230MHz
Low-noise PLL core
- PLL loop filter components integrated
- Low period jitter (typical 50ps)
Separate output supply pins:
- CDCE913-Q1: 3.3V and 2.5V
- CDCEL913-Q1: 1.8V
Flexible clock driver
- Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
- Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
- Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
- Programmable SSC modulation
- Enables 0-PPM clock generation
1.8V device power supply
Packaged in TSSOP
Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

Qualified for automotive applications
AEC-Q100 qualified with the following results:
- Device temperature grades
  - Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
  - Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
Functional Safety-Capable
- Documentation available to aid functional safety system design
In-system programmability and EEPROM
- Serial programmable volatile register
- Nonvolatile EEPROM to store customer settings
Flexible input clocking concept
- External crystal: 8MHz to 32MHz
- On-chip VCXO: pull range ±150ppm
- Single-ended LVCMOS up to 160MHz
Free selectable output frequency up to 230MHz
Low-noise PLL core
- PLL loop filter components integrated
- Low period jitter (typical 50ps)
Separate output supply pins:
- CDCE913-Q1: 3.3V and 2.5V
- CDCEL913-Q1: 1.8V
Flexible clock driver
- Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
- Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
- Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
- Programmable SSC modulation
- Enables 0-PPM clock generation
1.8V device power supply
Packaged in TSSOP
Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

filter

기타 클록 생성기 찾기

다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.

7개 모두 보기

상위 문서	유형	직함	형식 옵션	날짜
*	데이터 시트	CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs datasheet (Rev. E)	PDF \| HTML	2024. 8. 22
	애플리케이션 노트	Crystal or Crystal Oscillator Replacement with Silicon Devices		2014. 6. 18
	애플리케이션 노트	VCXO Application Guideline for CDCE(L)9xx Family (Rev. A)		2012. 4. 23
	애플리케이션 노트	General I2C / EEPROM usage for the CDCE(L)9xx family		2010. 1. 26
	애플리케이션 노트	Troubleshooting I2C Bus Protocol		2009. 10. 19
	애플리케이션 노트	Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913		2009. 9. 23
	애플리케이션 노트	Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency		2008. 3. 31

지원되는 제품 및 하드웨어

지금 설계하기

패키지	핀	CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW)	14	Ultra Librarian

TI의 평가 항목에 대한 표준 약관이 적용됩니다.

CDCEL913-Q1

1.8V LVCMOS 출력을 지원하는 차량용 카탈로그 프로그래머블 1-PLL VCXO 클록 신시사이저

CDCEL913-Q1

제품 상세 정보

기술 자료

설계 및 개발

DS90UB981-Q1EVM — DS90UB981-Q1 DSI-FPD-Link IV 브리지 시리얼라이저 평가 모듈

DS90UB981-Q1MEVM — DS90UB981-Q1 4K DSI - FPD-Link IV 브리지 시리얼라이저 평가 모듈

DS90UB983-Q1EVM — DS90UB983-Q1 DisplayPort-FPD-Link IV 브리지 시리얼라이저 평가 모듈

DS90UB983-Q1MEVM — DS90UB983-Q1 DisplayPort-FPD-Link IV 브리지 시리얼라이저 평가 모듈

CLOCK-TREE-ARCHITECT — 클록 트리 아키텍트 프로그래밍 소프트웨어

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

비디오 시리즈

동영상