CD40107B

활성

오픈 드레인 출력을 지원하는 2채널, 2입력, 3V~18V NAND 게이트

제품 상세 정보

Technology family CD4000 Number of channels 2 Inputs per channel 2 IOL (max) (mA) 89 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family CD4000 Number of channels 2 Inputs per channel 2 IOL (max) (mA) 89 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (P) 8 92.5083 mm² (9.81 mm × 9.43 mm) TSSOP (PW) 8 19.2 mm² (3 mm × 6.4 mm) SOP (PS) 8 48.36 mm² (6.2 mm × 7.8 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • 32 times standard B-Series output current drive sinking capability - 136 mA typ. @ VDD = 10 V, VDS = 1 V
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings
  • Noise margin, full package temperature range, RL to VDD = 10 k:
       1 V at VDD = 5 V
       2 V at VDD = 10 V
       2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications
    • Driving relays, lamps, LEDs
    • Line driver
    • Level shifter (up or down)
  • 32 times standard B-Series output current drive sinking capability - 136 mA typ. @ VDD = 10 V, VDS = 1 V
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings
  • Noise margin, full package temperature range, RL to VDD = 10 k:
       1 V at VDD = 5 V
       2 V at VDD = 10 V
       2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications
    • Driving relays, lamps, LEDs
    • Line driver
    • Level shifter (up or down)

The CD40107B is a dual 2-input NAND buffer/driver containing two independent 2-input NAND buffers with open-drain single n-channel transistor outputs. This device features a wired-OR capability and high output sink current capability (136 mA typ. at VDD = 10 V, VDS= 1 V). The CD40107B is supplied in 8-lead hermetic dual-in-line ceramic packages (F3A suffix), 8-lead dual-in-line plastic packages (E suffix), 8-lead small-outline packages (M, M96, MT, and PSR suffixes), and 8-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD40107B is a dual 2-input NAND buffer/driver containing two independent 2-input NAND buffers with open-drain single n-channel transistor outputs. This device features a wired-OR capability and high output sink current capability (136 mA typ. at VDD = 10 V, VDS= 1 V). The CD40107B is supplied in 8-lead hermetic dual-in-line ceramic packages (F3A suffix), 8-lead dual-in-line plastic packages (E suffix), 8-lead small-outline packages (M, M96, MT, and PSR suffixes), and 8-lead thin shrink small-outline packages (PW and PWR suffixes).

다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
1개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 CD40107B TYPES datasheet (Rev. D) 2003. 10. 13

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

CD40107B PSPICE Model (Rev. A)

SCHM030A.ZIP (7 KB) - PSpice 모델
지원되는 제품 및 하드웨어
패키지 CAD 기호, 풋프린트 및 3D 모델
PDIP (P) 8 Ultra Librarian
TSSOP (PW) 8 Ultra Librarian
SOP (PS) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상