AFE7685

활성

4전송, 4수신 RF 샘플링 트랜시버, 100MHz~5.2GHz, 최대 1200MHz IBW, 단일 DUC/DDC

이 제품의 최신 버전이 있습니다

open-in-new 대안 비교
비교 대상 장치와 유사한 기능.
AFE7989 활성 4전송, 4수신, 1피드백 RF 샘플링 트랜시버, 600MHz~6GHz, 최대 400MHz IBW Higher RF frequency limit (up to 6GHz), double SerDes speed (29.5Gbps).

제품 상세 정보

Applications Wireless infrastructure Number of TXs and RXs 4 TX, 4 RX RF frequency (max) (MHz) 5200 RF frequency (min) (MHz) 100 Number of DUCs per TX 1 Number of DDCs per RX 1 Operating temperature range (°C) -40 to 85 Rating Catalog
Applications Wireless infrastructure Number of TXs and RXs 4 TX, 4 RX RF frequency (max) (MHz) 5200 RF frequency (min) (MHz) 100 Number of DUCs per TX 1 Number of DDCs per RX 1 Operating temperature range (°C) -40 to 85 Rating Catalog
FCBGA (ABJ) 400 289 mm² (17 mm × 17 mm)
  • 14-Bit resolution
  • Sample rate:
    • DAC: 9GSPS
    • ADC: 3GSPS
  • RF Frequency range: up to 5.2 GHz
  • Maximum RF signal bandwidth
    • Quad-channel mode (4T4R): 800 MHz (single-band); 300 MHz (dual-band)
    • Dual-channel mode (2T2R): 1200 MHz (TX)/1000 MHz (RX) (single-band); 800MHz(dual-band)
  • On-chip dual selectable DSAs per RX channel
  • Integrated TX DSA functionality
  • Digital:
    • Dual band digital up-converters (DUCs)
    • Dual Band digital down-converters (DDCs)
    • 32-Bit NCOs for DUCs/DDCs
    • Interpolation ratio: 6x, 8x, 9x, 12x, 16x, 18x, 24x, 36x
    • Decimation ratio: /2, /3, /4, /6, /8, /9, /12, /16, /18, /24, /32
    • RX/FB Dynamic switching for TDD
  • Interface:
    • 8 SerDes Transceivers up to 15Gbps
    • 16-Bit and 12-bit JESD204B transport layer formatting with 8b/10b encoding
    • Subclass 1 multi-device synchronization
  • Clock:
    • Internal PLL/VCO to generate DAC and ADC clocks
  • Package: 17mm x 17mm FC BGA, 0.8mm pitch
  • Power supplies: 1.85 V, 1.15 V, 1.0 V, –1.8 V
  • 14-Bit resolution
  • Sample rate:
    • DAC: 9GSPS
    • ADC: 3GSPS
  • RF Frequency range: up to 5.2 GHz
  • Maximum RF signal bandwidth
    • Quad-channel mode (4T4R): 800 MHz (single-band); 300 MHz (dual-band)
    • Dual-channel mode (2T2R): 1200 MHz (TX)/1000 MHz (RX) (single-band); 800MHz(dual-band)
  • On-chip dual selectable DSAs per RX channel
  • Integrated TX DSA functionality
  • Digital:
    • Dual band digital up-converters (DUCs)
    • Dual Band digital down-converters (DDCs)
    • 32-Bit NCOs for DUCs/DDCs
    • Interpolation ratio: 6x, 8x, 9x, 12x, 16x, 18x, 24x, 36x
    • Decimation ratio: /2, /3, /4, /6, /8, /9, /12, /16, /18, /24, /32
    • RX/FB Dynamic switching for TDD
  • Interface:
    • 8 SerDes Transceivers up to 15Gbps
    • 16-Bit and 12-bit JESD204B transport layer formatting with 8b/10b encoding
    • Subclass 1 multi-device synchronization
  • Clock:
    • Internal PLL/VCO to generate DAC and ADC clocks
  • Package: 17mm x 17mm FC BGA, 0.8mm pitch
  • Power supplies: 1.85 V, 1.15 V, 1.0 V, –1.8 V

The AFE76xx is a family of high performance, quad/dual channel, 14-bit, integrated RF sampling analog front ends (AFEs) with 9 GSPS DACs and 3 GSPS ADCs, capable of synthesizing and digitizing wideband signals. High dynamic range allows the AFE76xx to generate and digitize 3G/4G signals for wireless base stations. In TDD mode, the receiver channel can be configured to dynamically switching between traffic receiver (TDD RX) status and wideband feedback receiver (TDD FB) status to assist DPD (Digital Pre-Distortion) of the Power Amplifier (PA) on the transmitter path.

The AFE76xx family has integrated DSA on the receiver channels and also supports DSA equivalent functionality on the transmitter channels. Each receiver channel has one analog RF peak power detector and various digital power detectors to assist AGC control for receiver channels, and two RF overload detectors for device reliability protection. The AFE76xx family has 8 of JESD204B compatible SerDes transceivers running up to 15 Gbps. The devices have up to two DUCs per TX channel and two DDCs per RX channel, with multiple interpolation/decimation rates and digital quadrature modulators/demodulators with independent, frequency flexible NCOs. The devices support more than 1000 MHz (800 MHz as 4T4R) RF signal bandwidth in single-band mode, and up to 800 MHz (300 MHz as 4T4R) RF signal bandwidth per band in dual-band mode. A low jitter PLL/VCO simplifies the sampling clock generation by allowing use of a lower frequency reference clock.

The AFE76xx is a family of high performance, quad/dual channel, 14-bit, integrated RF sampling analog front ends (AFEs) with 9 GSPS DACs and 3 GSPS ADCs, capable of synthesizing and digitizing wideband signals. High dynamic range allows the AFE76xx to generate and digitize 3G/4G signals for wireless base stations. In TDD mode, the receiver channel can be configured to dynamically switching between traffic receiver (TDD RX) status and wideband feedback receiver (TDD FB) status to assist DPD (Digital Pre-Distortion) of the Power Amplifier (PA) on the transmitter path.

The AFE76xx family has integrated DSA on the receiver channels and also supports DSA equivalent functionality on the transmitter channels. Each receiver channel has one analog RF peak power detector and various digital power detectors to assist AGC control for receiver channels, and two RF overload detectors for device reliability protection. The AFE76xx family has 8 of JESD204B compatible SerDes transceivers running up to 15 Gbps. The devices have up to two DUCs per TX channel and two DDCs per RX channel, with multiple interpolation/decimation rates and digital quadrature modulators/demodulators with independent, frequency flexible NCOs. The devices support more than 1000 MHz (800 MHz as 4T4R) RF signal bandwidth in single-band mode, and up to 800 MHz (300 MHz as 4T4R) RF signal bandwidth per band in dual-band mode. A low jitter PLL/VCO simplifies the sampling clock generation by allowing use of a lower frequency reference clock.

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추가 정보 요청

상용 무선 전용 AFE7685에 대한 전체 데이터 시트 및 기타 설계 리소스를 참조하십시오. 지금 요청

다른 모든 애플리케이션의 경우 TI의 범용 RF 샘플링 AFE를 참조하십시오.

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
10개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 AFE76xx Quad/dual-channel, RF sampling analog front-end with 14-bit 9GSPS DACs and 14-bit 3GSPS ADCs datasheet (Rev. E) PDF | HTML 2019. 3. 1
애플리케이션 노트 Small Cell and Repeater System Using Integrated RF Sampling Device (Rev. A) 2021. 9. 2
애플리케이션 노트 MIMO Transceiver with AFE76xx for LTE and 5G Wireless Radio (Rev. A) 2021. 9. 2
애플리케이션 노트 Temp Profile to Maintain Optimum FIT Performance 2019. 7. 23
애플리케이션 노트 RF Sampling for Multi-band Radios 2018. 11. 26
애플리케이션 노트 AFE76xx as a Single-Chip Wideband Repeater Using Loopback Mode 2018. 11. 1
애플리케이션 노트 Dither Improves ACPR in RF Sampling DAC 2018. 10. 24
애플리케이션 노트 Modular Communications Transceiver for 4G/5G Distributed Antenna 2018. 8. 18
애플리케이션 노트 AFE768x Power Dissipation Comparison across Modes 2018. 7. 25
애플리케이션 노트 An Efficient LDO-less Power Supply Solution for AFE76xx 2017. 11. 13

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

펌웨어

TI204C-IP — Request for JESD204 rapid design IP

JESD204 고속 설계 IP는 FPGA 엔지니어가 JESD204 시스템으로 작동하는 경로를 가속화할 수 있도록 설계 IP는 다운스트림 디지털 처리 및 기타 애플리케이션 로직이 JESD204 프로토콜 대부분의 성능 및 타이밍에 중요한 제약 조건으로부터 격리되는 방식으로 설계되었습니다. IP는 설계자가 펌웨어 개발 시간을 단축하고 FPGA 통합을 쉽게 수행할 수 있도록 지원합니다.

JESD204 고속 설계 IP는 TI 고속 데이터 컨버터와 함께 사용할 수 있도록 로열티 없이 제공됩니다. TI는 특정 FPGA 플랫폼과 TI 데이터 (...)

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