ADS1258-EP
- 24 Bits, No Missing Codes
- Fixed-Channel or Automatic Channel Scan
- Fixed-Channel Data Rate: 125 kSPS
- Auto-Scan Data Rate: 23.7 kSPS/Channel
- Single-Conversion Settled Data
- 16 Single-Ended or 8 Differential Inputs
- Unipolar (5 V) or Bipolar (±2.5 V) Operation
- Low Noise: 2.8 µVRMS at 1.8 kSPS
- 0.0003% Integral Nonlinearity
- DC Stability (typical):
0.02 µV/°C Offset Drift, 0.4 ppm/°C Gain Drift - Open-Sensor Detection
- Conversion Control Pin
- Multiplexer Output for External Signal Conditioning
- On-Chip Temperature, Reference, Offset, Gain, and
Supply Voltage Readback - 42-mW Power Dissipation
- Standby, Sleep, and Power-Down Modes
- 8 General-Purpose Inputs/Outputs (GPIO)
- 32.768-kHz Crystal Oscillator or External Clock
- APPLICATIONS
- Medical, Avionics, and Process Control
- Machine and System Monitoring
- Fast Scan Multi-Channel Instrumentation
- Industrial Systems
- Test and Measurement Systems
- APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C) and
Industrial (–40°C/105°C) Temperature Ranges(1) - Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
(1) Custom temperature ranges available
All other trademarks are the property of their respective owners
The ADS1258 is a 16-channel (multiplexed), low-noise, 24-bit, delta-sigma (
) analog-to-digital converter (ADC) that provides single-cycle settled data at channel scan rates from 1.8k to 23.7k samples per second (SPS) per channel. A flexible input multiplexer accepts combinations of eight differential or 16 single-ended inputs with a full-scale differential range of 5 V or true bipolar range of ±2.5 V when operating with a 5-V reference. The fourth-order delta-sigma modulator is followed by a fifth-order sinc digital filter optimized for low-noise performance.
The differential output of the multiplexer is accessible to allow signal conditioning prior to the input of the ADC. Internal system monitor registers provide supply voltage, temperature, reference voltage, gain, and offset data.
An onboard PLL generates the system clock from a 32.768-kHz crystal, or can be overridden by an external clock source. A buffered system clock output (15.7 MHz) is provided to drive a microcontroller or additional converters.
Serial digital communication is handled via an SPI-compatible interface. A simple command word structure controls channel configuration, data rates, digital I/O, monitor functions, etc.
Programmable sensor bias current sources can be used to bias sensors or verify sensor integrity.
The ADS1258 operates from a unipolar 5-V or bipolar ±2.5-V analog supply and a digital supply compatible with interfaces ranging from 2.7 V to 5.25 V. The ADS1258 is available in QFN-48 and QFP-48 packages.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 | |
|---|---|---|---|---|---|---|
| * | 데이터 시트 | 16-Channel, 24-Bit, Analog-to-Digital Converter datasheet (Rev. D) | 2011. 3. 18 | |||
| * | 방사능 및 안정성 보고서 | Reliability Report ADS1258MPHPTEP | 2014. 12. 22 | |||
| * | 방사능 및 안정성 보고서 | ADS1258MRTCTEP Reliability Report | 2011. 8. 25 | |||
| * | 방사능 및 안정성 보고서 | ADS1258MPHPTEP Reliability Report | 2011. 8. 25 | |||
| * | VID | ADS1258-EP VID V6209626 | 2016. 6. 21 | |||
| 애플리케이션 노트 | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2024. 3. 18 | |||
| 애플리케이션 노트 | A Basic Guide to Bridge Measurements (Rev. A) | PDF | HTML | 2024. 3. 13 | |||
| 애플리케이션 노트 | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023. 3. 29 | |||
| e북 | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 2020. 6. 19 | ||||
| e북 | Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs | 2015. 3. 19 | ||||
| 애플리케이션 노트 | ADS1258, ADS1258-EP, and ADS1158 SPI™ Timeout Function | 2012. 4. 20 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ADS1258-C-EXAMPLE-CODE — ADS1258 Example C Code
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
아날로그 엔지니어의 계산기는 아날로그 회로 설계 엔지니어가 정기적으로 사용하는 많은 반복 계산의 속도를 높이도록 설계되었습니다. 이 PC 기반 툴은 피드백 저항을 사용한 연산 증폭기 게인 설정부터 아날로그-디지털 컨버터(ADC) 드라이브 버퍼 회로 안정화를 위한 적절한 회로 설계 요소 선택에 이르기까지 다양한 일반적인 계산 목록이 포함된 그래픽 인터페이스를 제공합니다.
이 계산기는 독립 실행형 툴로 유용할 뿐만 아니라 아날로그 엔지니어의 포켓 레퍼런스에 설명된 개념과도 잘 어울립니다.
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| HTQFP (PHP) | 48 | Ultra Librarian |
| VQFNP (RTC) | 48 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.