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TPS51116

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Vollständiger synchroner Abwärtsregler für DDR-, DDR2-, DDR3-, DDR3L-, LPDDR3- und DDR4-Stromversorg

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TPS51116

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Produktdetails

Product type DDR Vin (min) (V) 3 Vin (max) (V) 28 Vout (min) (V) 0.75 Vout (max) (V) 3 Features Complete Solution, Shutdown Pin for S3 Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.8 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
Product type DDR Vin (min) (V) 3 Vin (max) (V) 28 Vout (min) (V) 0.75 Vout (max) (V) 3 Features Complete Solution, Shutdown Pin for S3 Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.8 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
HTSSOP (PWP) 20 41.6 mm² (6.5 mm × 6.4 mm) VQFN (RGE) 24 16 mm² (4 mm × 4 mm)
  • Synchronous Buck Controller (VDDQ)
    • Wide-Input Voltage Range: 3.0-V to 28-V
    • D−CAP™ Mode with 100-ns Load Step Response
    • Current Mode Option Supports Ceramic Output Capacitors
    • Supports Soft-Off in S4/S5 States
    • Current Sensing from RDS(on) or Resistor
    • 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
      1.5-V (DDR3), 1.35-V (DDR3L), 1.2-V (LPDDR3 and DDR4) or
      Output Range 0.75-V to 3.0-V
    • Equipped with Powergood, Overvoltage Protection and Undervoltage Protection
  • 3-A LDO (VTT), Buffered Reference (VREF)
    • Capable to Sink and Source 3 A
    • LDO Input Available to Optimize Power Losses
    • Requires only 20-µF Ceramic Output Capacitor
    • Buffered Low Noise 10-mA VREF Output
    • Accuracy ±20 mV for both VREF and VTT
    • Supports High-Z in S3 and Soft-Off in S4/S5
    • Thermal Shutdown
  • Synchronous Buck Controller (VDDQ)
    • Wide-Input Voltage Range: 3.0-V to 28-V
    • D−CAP™ Mode with 100-ns Load Step Response
    • Current Mode Option Supports Ceramic Output Capacitors
    • Supports Soft-Off in S4/S5 States
    • Current Sensing from RDS(on) or Resistor
    • 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
      1.5-V (DDR3), 1.35-V (DDR3L), 1.2-V (LPDDR3 and DDR4) or
      Output Range 0.75-V to 3.0-V
    • Equipped with Powergood, Overvoltage Protection and Undervoltage Protection
  • 3-A LDO (VTT), Buffered Reference (VREF)
    • Capable to Sink and Source 3 A
    • LDO Input Available to Optimize Power Losses
    • Requires only 20-µF Ceramic Output Capacitor
    • Buffered Low Noise 10-mA VREF Output
    • Accuracy ±20 mV for both VREF and VTT
    • Supports High-Z in S3 and Soft-Off in S4/S5
    • Thermal Shutdown

The TPS51116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15, DDR3L, LPDDR3 and DDR4 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The device offers the lowest total solution cost in systems where space is at a premium. The synchronous controller runs fixed 400-kHz, pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The device supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). The device has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4 × 4 QFN.

The TPS51116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15, DDR3L, LPDDR3 and DDR4 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The device offers the lowest total solution cost in systems where space is at a premium. The synchronous controller runs fixed 400-kHz, pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The device supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). The device has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4 × 4 QFN.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt TPS51116 Complete DDR, DDR2, DDR3, DDR3L, LPDDR3 and DDR4 Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference datasheet (Rev. J) PDF | HTML 16.11.2017
Analog Design Journal Control-Mode Quick Reference Guide (Rev. B) PDF | HTML 29.08.2023
Anwendungshinweis DDR VTT Power Solutions: A Competitive Analysis (Rev. A) 09.07.2020
Auswahlhilfe Power Management Guide 2018 (Rev. R) 25.06.2018
Technischer Artikel Design advantage of D-CAP control topology PDF | HTML 13.04.2017
Technischer Artikel D-CAP3 – A sequel better than the original PDF | HTML 07.05.2015
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Anwendungshinweis Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472) 31.03.2010
Anwendungshinweis 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) 26.03.2010
Anwendungshinweis TMS320C6472 5V Input Pwr Design, Integrated FET DC/DC Converters and Controllers 26.03.2010
Anwendungshinweis Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs 26.03.2010
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Anwendungshinweis DDR2 Power Solutions for Notebooks 24.05.2004

Design und Entwicklung

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Evaluierungsplatine

TPS51116EVM-001 — TPS51116 Speicher-Leistungslösung, Synchron-Abwärts-Controller-Evaluierungsmodul

The TPS51116EVM evaluation module (EVM) is a dual-output converter for DDR and DDRII memory modules. It uses a 10 A synchronous buck converter to provide the core voltage (VDDQ) for DDR memory modules. The EVM is designed to use a 4.5 V to 28 V supply voltage and a 4.75 V to (...)

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Simulationsmodell

TPS51116 PSpice Transient Model (Rev. B)

SLIM076 (96 KB) - PSpice-Modell
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Simulationsmodell

TPS51116 TINA-TI Transient Reference Design

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TPS51116 TINA-TI Transient Spice Model

SLUM167.ZIP (58 KB) - TINA-TI Spice-Modell
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HTSSOP (PWP) 20 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian
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