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TMS320F2811-Q1

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C2000™-MCU für den Automobilbereich, 32 Bit, mit 150 MHz, 256 KB Flash

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TMS320F2811-Q1

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Produktdetails

CPU 1 C28 Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 12-bit Total processing (MIPS) 150 Features 2-pin oscillator, 32-bit CPU timers, External memory interface, McBSP, Watchdog timer UART 2 CAN (#) 1 Sigma-delta filter 0 PWM (Ch) 16 Number of ADC channels 16 Direct memory access (Ch) 0 SPI 1 QEP 2 USB No Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN, McBSP, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 256 Number of GPIOs 56 Number of I2Cs 0 Security Secure storage Edge AI enabled No
CPU 1 C28 Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 12-bit Total processing (MIPS) 150 Features 2-pin oscillator, 32-bit CPU timers, External memory interface, McBSP, Watchdog timer UART 2 CAN (#) 1 Sigma-delta filter 0 PWM (Ch) 16 Number of ADC channels 16 Direct memory access (Ch) 0 SPI 1 QEP 2 USB No Operating temperature range (°C) -40 to 125 Rating Automotive Communication interface CAN, McBSP, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 256 Number of GPIOs 56 Number of I2Cs 0 Security Secure storage Edge AI enabled No
LQFP (PBK) 128 256 mm² 16 x 16
  • High-performance static CMOS technology
    • 150 MHz (6.67-ns cycle time)
    • Low-power (1.8-V core at 135 MHz, 1.9-V core at 150 MHz, 3.3-V I/O) design
  • JTAG boundary scan support
    • IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
  • High-performance 32-bit CPU (TMS320C28x)
    • 16 × 16 and 32 × 32 MAC operations
    • 16 × 16 dual MAC
    • Harvard bus architecture
    • Atomic operations
    • Fast interrupt response and processing
    • Unified memory programming model
    • 4M linear program/data address reach
    • Code-efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x processor source code compatible
  • On-chip memory
    • Up to 128K × 16 flash (Four 8K × 16 and six 16K × 16 sectors)
    • 1K × 16 OTP ROM
    • L0 and L1: 2 blocks of 4K × 16 each Single-Access RAM (SARAM)
    • H0: 1 block of 8K × 16 SARAM
    • M0 and M1: 2 blocks of 1K × 16 each SARAM
  • Boot ROM (4K × 16)
    • With software boot modes
    • Standard math tables
  • External interface (F2812)
    • Over 1M × 16 total memory
    • Programmable wait states
    • Programmable read/write strobe timing
    • Three individual chip selects
  • Endianness: Little endian
  • Clock and system control
    • On-chip oscillator
    • Watchdog timer module
  • Three external interrupts
  • Peripheral Interrupt Expansion (PIE) block that supports 45 peripheral interrupts
  • Three 32-bit CPU timers
  • 128-bit security key/lock
    • Protects flash/OTP and L0/L1 SARAM
    • Prevents firmware reverse-engineering
  • Motor control peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA devices
  • Serial port peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), standard UART
    • Enhanced Controller Area Network (eCAN)
    • Multichannel Buffered Serial Port (McBSP)
  • 12-bit ADC, 16 channels
    • 2 × 8 channel input multiplexer
    • Two Sample-and-Hold
    • Single/simultaneous conversions
    • Fast conversion rate: 80 ns/12.5 MSPS
  • Up to 56 General-Purpose I/O (GPIO) pins
  • Advanced emulation features
    • Analysis and breakpoint functions
    • Real-time debug via hardware
  • Development tools include
    • ANSI C/C++ compiler/assembler/linker
    • Code Composer Studio™ IDE
    • DSP/BIOS™
    • JTAG scan controllers
      • IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
  • Low-power modes and power savings
    • IDLE, STANDBY, HALT modes supported
    • Disable individual peripheral clocks
  • Package options
    • 179-ball MicroStar BGA™ with external memory interface (GHH, ZHH) (F2812)
    • 176-pin Low-Profile Quad Flatpack (LQFP) with external memory interface (PGF) (F2812)
    • 128-pin LQFP without external memory interface (PBK) (F2810, F2811)
  • Temperature options
    • A: –40°C to 85°C (GHH, ZHH, PGF, PBK)
    • S: –40°C to 125°C (GHH, ZHH, PGF, PBK)
    • Q: –40°C to 125°C (PGF, PBK) (AEC-Q100 qualification for automotive applications)
  • High-performance static CMOS technology
    • 150 MHz (6.67-ns cycle time)
    • Low-power (1.8-V core at 135 MHz, 1.9-V core at 150 MHz, 3.3-V I/O) design
  • JTAG boundary scan support
    • IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
  • High-performance 32-bit CPU (TMS320C28x)
    • 16 × 16 and 32 × 32 MAC operations
    • 16 × 16 dual MAC
    • Harvard bus architecture
    • Atomic operations
    • Fast interrupt response and processing
    • Unified memory programming model
    • 4M linear program/data address reach
    • Code-efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x processor source code compatible
  • On-chip memory
    • Up to 128K × 16 flash (Four 8K × 16 and six 16K × 16 sectors)
    • 1K × 16 OTP ROM
    • L0 and L1: 2 blocks of 4K × 16 each Single-Access RAM (SARAM)
    • H0: 1 block of 8K × 16 SARAM
    • M0 and M1: 2 blocks of 1K × 16 each SARAM
  • Boot ROM (4K × 16)
    • With software boot modes
    • Standard math tables
  • External interface (F2812)
    • Over 1M × 16 total memory
    • Programmable wait states
    • Programmable read/write strobe timing
    • Three individual chip selects
  • Endianness: Little endian
  • Clock and system control
    • On-chip oscillator
    • Watchdog timer module
  • Three external interrupts
  • Peripheral Interrupt Expansion (PIE) block that supports 45 peripheral interrupts
  • Three 32-bit CPU timers
  • 128-bit security key/lock
    • Protects flash/OTP and L0/L1 SARAM
    • Prevents firmware reverse-engineering
  • Motor control peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA devices
  • Serial port peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), standard UART
    • Enhanced Controller Area Network (eCAN)
    • Multichannel Buffered Serial Port (McBSP)
  • 12-bit ADC, 16 channels
    • 2 × 8 channel input multiplexer
    • Two Sample-and-Hold
    • Single/simultaneous conversions
    • Fast conversion rate: 80 ns/12.5 MSPS
  • Up to 56 General-Purpose I/O (GPIO) pins
  • Advanced emulation features
    • Analysis and breakpoint functions
    • Real-time debug via hardware
  • Development tools include
    • ANSI C/C++ compiler/assembler/linker
    • Code Composer Studio™ IDE
    • DSP/BIOS™
    • JTAG scan controllers
      • IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
  • Low-power modes and power savings
    • IDLE, STANDBY, HALT modes supported
    • Disable individual peripheral clocks
  • Package options
    • 179-ball MicroStar BGA™ with external memory interface (GHH, ZHH) (F2812)
    • 176-pin Low-Profile Quad Flatpack (LQFP) with external memory interface (PGF) (F2812)
    • 128-pin LQFP without external memory interface (PBK) (F2810, F2811)
  • Temperature options
    • A: –40°C to 85°C (GHH, ZHH, PGF, PBK)
    • S: –40°C to 125°C (GHH, ZHH, PGF, PBK)
    • Q: –40°C to 125°C (PGF, PBK) (AEC-Q100 qualification for automotive applications)

The TMS320F2810, TMS320F2811, and TMS320F2812-Q1 devices, members of the TMS320C28x DSP generation, are highly integrated, high-performance solutions for demanding control applications.

Throughout this document, TMS320F2810, TMS320F2811, and TMS320F2812-Q1 are abbreviated as F2810, F2811, and F2812-Q1, respectively. F281x denotes all three devices.

The TMS320F2810, TMS320F2811, and TMS320F2812-Q1 devices, members of the TMS320C28x DSP generation, are highly integrated, high-performance solutions for demanding control applications.

Throughout this document, TMS320F2810, TMS320F2811, and TMS320F2812-Q1 are abbreviated as F2810, F2811, and F2812-Q1, respectively. F281x denotes all three devices.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet TMS320F281x Digital Signal Processors datasheet (Rev. V) 14 Jan 2021
* Errata TMS320F281x DSPs Silicon Errata (Rev. T) PDF | HTML 19 Dez 2023
User guide C2000 Real-Time Control Peripheral Reference Guide (Rev. U) PDF | HTML 11 Jul 2025
Application note Development Tool Versions for C2000™ Support (Rev. A) PDF | HTML 26 Jun 2024
Application note Semiconductor and IC Package Thermal Metrics (Rev. D) PDF | HTML 25 Mär 2024
Application note EEPROM Emulation for Gen 2 C2000 Real-Time MCUs (Rev. A) 23 Jul 2020
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 Jun 2020
Application note Configurable Error Generator for Controller Area Network PDF | HTML 19 Dez 2019
Application note Calculating Useful Lifetimes of Embedded Processors (Rev. B) PDF | HTML 07 Mai 2019
Application note MSL Ratings and Reflow Profiles (Rev. A) 13 Dez 2018
Application note Hardware Design Guidelines for TMS320F28xx and TMS320F28xxx DSCs (Rev. D) 18 Nov 2018
Application note Programming TMS320x28xx and 28xxx Peripherals in C/C++ (Rev. E) PDF | HTML 19 Dez 2017
Application note C2000™ MISRA-C Policy 26 Sep 2017
Application note Programming Examples for the TMS320x28xx eCAN (Rev. B) PDF | HTML 12 Sep 2017
Application note Copying Compiler Sections from Flash to RAM on the TMS320F28xxx DSCs (Rev. A) PDF | HTML 18 Aug 2017
Application note Calculator for CAN Bit Timing Parameters PDF | HTML 22 Mär 2016
User guide TMS320C28x DSP CPU and Instruction Set (Rev. F) 10 Apr 2015
Application note Calculating FIT for a Mission Profile 24 Mär 2015
Application note Running an Application from Internal Flash Memory on the TMS320F28xxx DSP (Rev. L) 28 Feb 2013
User guide TMS320x281x System Control and Interrupts Reference Guide (Rev. G) 20 Aug 2012
User guide TMS320x281x Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. D) 29 Aug 2011
Application note Programming External Nonvolatile Memory Using SDFlash for TMS320C28x Devices 16 Nov 2009
User guide TMS320x281x Serial Communications Interface (SCI) Reference Guide (Rev. D) 07 Jul 2009
Application note Common Object File Format (COFF) 15 Apr 2009
Application note Migrating from TMS320x2833x/2823x to TMS320x2834x 03 Mär 2009
User guide TMS320x281x Serial Peripheral Interface (SPI)Reference Guide (Rev. E) 06 Feb 2009
User guide TMS320x280x, 2801x, 2804x Serial Peripheral Interface (SPI) Reference Guide 05 Feb 2009
User guide TMS320x280x, 2801x DSP Enhanced Controller Area Network (eCAN) User's Guide 22 Jan 2009
User guide TMS320x281x Enhanced Controller Area Network (eCAN) Reference Guide (Rev. F) 22 Jan 2009
Application note Flash Programming Solutions for the TMS320F28xxx DSCs 19 Aug 2008
Application note An Overview of Designing Analog Interface With TM320F28xx/28xxx DSCs (Rev. A) 14 Mai 2008
Application note Microstepping Bipolar Drive of Two-Phase Hybrid Stepping Motor on F2808 DSP 02 Mai 2008
Application note TMS320F281x Boot ROM Serial Flash Programming 11 Okt 2007
Application note Custom Bootloader Options via One-Time Programmable (OTP) Memory 18 Sep 2007
Application note Interfacing SD/MMC Cards With TMS320F28xxx DSCs 26 Jul 2007
User guide TMS320x281x Event Manager Reference Guide (Rev. E) 27 Jun 2007
Application note Using Enhanced Pulse Width Modulator (ePWM) Module for 0-100% Duty Cycle Control 20 Dez 2006
User guide TMS320x281x Boot ROM Reference Guide (Rev. C) 04 Dez 2006
Application note Using the eQEP Module in TMS320x280x as a Dedicated Capture 30 Nov 2006
Application note Migrating from TMS320x281x to TMS320x280x/2801x/2804x (Rev. A) 05 Okt 2006
User guide TMS320x281x Analog-to-Digital Converter (ADC) Reference Guide (Rev. D) 14 Jul 2005
Application note TMS320F2810, TMS320F2811, TMS320F2812 ADC Calibration (Rev. A) 30 Nov 2004
Application note Online Stack Overflow Detection on the TMS320C28x DSP 02 Mai 2003

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