SN74LVT125-Q1

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4-Kanal-Puffer mit bus-hold, 2,7 bis 3,6 V für die Automobilindustrie mit TTL-kompatiblen CMOS-Eingä

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Datenblatt

document-pdfAcrobat 3.3-V ABT Quadruple Bus Buffer With 3-State Outputs datasheet (Rev. B) (Englisch)

SN74LVT125-Q1

AKTIV

Datenblatt

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Produktdetails

Technology family

LVT

Number of channels

4

IOL (max) (mA)

32

Supply current (max) (µA)

7000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Technology family

LVT

Number of channels

4

IOL (max) (mA)

32

Supply current (max) (µA)

7000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

SOIC (D)

14

51.9 mm² (8.65 mm × 6 mm)

TSSOP (PW)

14

32 mm² (5 mm × 6.4 mm)

Qualified for Automotive Applications
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Supports Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors

Qualified for Automotive Applications
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Supports Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors

This bus buffer is designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This bus buffer is designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Top-Dokumentation	Typ	Titel	Format-Optionen	Neueste englische Version herunterladen	Datum
*	Datenblatt	3.3-V ABT Quadruple Bus Buffer With 3-State Outputs datasheet (Rev. B)			09.04.2008

Design und Entwicklung

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Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

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