SN74LVC1G86-Q1

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XOR-Gate mit 2 Eingängen, 1,65 V bis 5,5 V (Exklusiv OR) für die Automobilindustrie

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Datenblatt

document-pdfAcrobat SN74LVC1G86-Q1 Single 2-Input Exclusive-OR Gate datasheet (Englisch) PDF | HTML

SN74LVC1G86-Q1

AKTIV

Jetzt bestellen

Produktdetails

Technology family

LVC

Number of channels

1

Inputs per channel

2

IOL (max) (mA)

32

Input type

Standard CMOS

IOH (max) (mA)

-32

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Number of channels

1

Inputs per channel

2

IOL (max) (mA)

32

Input type

Standard CMOS

IOH (max) (mA)

-32

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Automotive

Operating temperature range (°C)

-40 to 125

SOT-SC70 (DCK)

5

4.2 mm² (2 mm × 2.1 mm)

Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
- ±4000-V Human-Body Model (HBM) ESD Classification Level 3A
- ±1000-V Charged-Device Model (CDM) ESD Classification Level C5
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Supports Down Translation to V_CC
Low Power Consumption, 15-µA Maximum I_CC
Maximum t_pd of 6 ns at 3.3 V and 50-pF load
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
- ±4000-V Human-Body Model (HBM) ESD Classification Level 3A
- ±1000-V Charged-Device Model (CDM) ESD Classification Level C5
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Supports Down Translation to V_CC
Low Power Consumption, 15-µA Maximum I_CC
Maximum t_pd of 6 ns at 3.3 V and 50-pF load
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

The SN74LVC1G86-Q1 is an automotive qualified device that performs the Boolean function Y = AB + AB in positive logic. This single 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V V_CC operation.

If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. This device has low power consumption with maximum t_pd of 6 ns at 3.3 V and 50-pF capacitive load. The max output drive is ±32-mA at 4.5 V and ±24-mA at 3.3 V.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current back flow through the device when it is powered down.

The SN74LVC1G86-Q1 is an automotive qualified device that performs the Boolean function Y = AB + AB in positive logic. This single 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V V_CC operation.

If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. This device has low power consumption with maximum t_pd of 6 ns at 3.3 V and 50-pF capacitive load. The max output drive is ±32-mA at 4.5 V and ±24-mA at 3.3 V.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current back flow through the device when it is powered down.

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Top-Dokumentation	Typ	Titel	Format-Optionen	Neueste englische Version herunterladen		Datum
*	Datenblatt	SN74LVC1G86-Q1 Single 2-Input Exclusive-OR Gate datasheet	PDF \| HTML		04.10.2016

Design und Entwicklung

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