Produktdetails

Number of channels 8 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HC Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 8 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HC Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm)
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • True Logic

  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • True Logic

These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so the buses are effectively isolated.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so the buses are effectively isolated.

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* Datenblatt SN54HC645, SN74HC645 datasheet (Rev. B) 13.12.2002

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