Produktdetails

Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Configuration 2:1 SPDT Number of channels 4 Bandwidth (MHz) 100 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 4 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 8000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog, I2C, I2S, JTAG, RGMII, SPI, TDM, UART Configuration 2:1 SPDT Number of channels 4 Bandwidth (MHz) 100 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 4 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 8000 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
TVSOP (DGV) 16 23.04 mm² (3.6 mm × 6.4 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOT-23-THN (DYY) 16 8.4 mm² (4.2 mm × 2 mm)
  • Output voltage translation tracks VCC
  • Supports mixed-mode signal operation on all data I/O ports
    • 5V input down to 3.3V output level shift with 3.3V VCC
    • 5V/3.3V input down to 2.5V output level shift with 2.5V VCC
  • 5V-tolerant I/Os with device powered up or powered down
  • Bidirectional data flow with near-zero propagation delay
  • Low ON-state resistance (ron) characteristics (ron = 5Ω typ)
  • Low input/output capacitance minimizes loading (Cio(OFF) = 5pF typ)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 20µA max)
  • VCC operating range from 2.3V to 3.6V
  • Data I/Os support 0V to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
  • Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114B, Class II)
    • 1000V charged-device model (C101)
  • Output voltage translation tracks VCC
  • Supports mixed-mode signal operation on all data I/O ports
    • 5V input down to 3.3V output level shift with 3.3V VCC
    • 5V/3.3V input down to 2.5V output level shift with 2.5V VCC
  • 5V-tolerant I/Os with device powered up or powered down
  • Bidirectional data flow with near-zero propagation delay
  • Low ON-state resistance (ron) characteristics (ron = 5Ω typ)
  • Low input/output capacitance minimizes loading (Cio(OFF) = 5pF typ)
  • Data and control inputs provide undershoot clamp diodes
  • Low power consumption (ICC = 20µA max)
  • VCC operating range from 2.3V to 3.6V
  • Data I/Os support 0V to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
  • Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114B, Class II)
    • 1000V charged-device model (C101)

The SN74CB3T3257 is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3257 supports systems using 5V TTL, 3.3V LVTTL, and 2.5V CMOS switching standards, as well as user-defined switching levels.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature verifies that damaging current does not backflow through the device when the device is powered down. The device has isolation during power off.

The SN74CB3T3257 is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3257 supports systems using 5V TTL, 3.3V LVTTL, and 2.5V CMOS switching standards, as well as user-defined switching levels.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature verifies that damaging current does not backflow through the device when the device is powered down. The device has isolation during power off.

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* Datenblatt SN74CB3T3257 4-Bit 1-of-2 FET Multiplexer/Demultiplexer 2.5V/3.3V Low-Voltage Bus Switch With 5V-Tolerant Level Shifter datasheet (Rev. B) PDF | HTML 09.12.2025
Anwendungshinweis Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02.06.2022
Anwendungshinweis Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01.12.2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06.01.2021

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LEADED-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zur schnellen Prüfung der 5-, 8-, 10-, 16- und 24-poligen

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HSPICE Model for SN74CB3T3257

SCDM117.ZIP (102 KB) - HSpice-Modell
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SN74CB3T3257 IBIS Model

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
TVSOP (DGV) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
SOT-23-THN (DYY) 16 Ultra Librarian

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