SN74AUC1G08

AKTIV

Ultra-Highspeed-UND-Gatter (2,4 ns) mit 1 Kanälen, 2 Eingängen, 0,8 V bis 2,7 V

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Datenblatt

document-pdfAcrobat SN74AUC1G08 Single 2-Input Positive-AND Gate datasheet (Rev. P) (Englisch) PDF | HTML

SN74AUC1G08

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Technology family

AUC

Number of channels

1

Inputs per channel

2

IOL (max) (mA)

9

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AUC

Number of channels

1

Inputs per channel

2

IOL (max) (mA)

9

IOH (max) (mA)

-9

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

250

Rating

Catalog

Operating temperature range (°C)

-40 to 85

DSBGA (YZP)

5

2.1875 mm² (— mm × — mm)

SOT-5X3 (DRL)

5

2.56 mm² (1.6 mm × 1.6 mm)

SOT-SC70 (DCK)

5

4.2 mm² (2 mm × 2.1 mm)

SOT-23 (DBV)

5

8.12 mm² (2.9 mm × 2.8 mm)

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode and Back Drive Protection
Sub-1-V Operable
Max t_pd of 2.4 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode and Back Drive Protection
Sub-1-V Operable
Max t_pd of 2.4 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V

This single 2-input positive-AND gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC1G08 device performs the Boolean function in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single 2-input positive-AND gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC1G08 device performs the Boolean function in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Top-Dokumentation	Typ	Titel	Format-Optionen	Neueste englische Version herunterladen	Datum
*	Datenblatt	SN74AUC1G08 Single 2-Input Positive-AND Gate datasheet (Rev. P)	PDF \| HTML		08.06.2017

Design und Entwicklung

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