The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.
The outputs of the SN65LVDS100 and SN65LVDT100 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the SN65LVDS101 and SN65LVDT101 are compatible with 3.3-V PECL levels. Both drive differential transmission lines with nominally 100-Ω characteristic impedance.
The SN65LVDT100 and SN65LVDT101 include a 110-Ω differential line termination resistor for less board space, fewer components, and the shortest stub length possible. They do not include the VBB voltage reference found in the SN65LVDS100 and SN65LVDS101. VBB provides a voltage reference of typically 1.35 V below VCC for use in receiving single-ended input signals and is particularly useful with single-ended 3.3-V PECL inputs. When VBB is not used, it should be unconnected or open.
All devices are characterized for operation from –40°C to 85°C.
| Top-Dokumentation | Typ | Titel | Format-Optionen | Neueste englische Version herunterladen | Datum |
|---|---|---|---|---|---|
| * | Datenblatt | SN65LVDx10x Differential Translator/Repeater datasheet (Rev. E) | PDF | HTML | 20.07.2015 | |
| Application brief | How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver | 09.01.2019 | |||
| Anwendungshinweis | Signaling Rate vs. Distance for Differential Buffers | 26.01.2010 | |||
| Anwendungshinweis | AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) | 17.10.2007 | |||
| Anwendungshinweis | DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML | 19.02.2003 | |||
| Weitere Dokumente | HPL EVM Program | 29.08.2002 |
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The EVM allows evaluation of operation of theSN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can beobserved across on board terminations, or via direct connection to 50-ohm (...)
The EVM allows evaluation of operation of the SN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can be observed across on board terminations, or via direct connection to (...)
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This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex (...)
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| VSSOP (DGK) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
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