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MSPM0G5187

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Arm®-Cortex®-M0+-MCU, 80 MHz, 128 kB Flash, 32 kB SRAM, USB 2.0 FS, I2S, ADC und TinyEngine™ NPU<

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MSPM0G5187

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Produktdetails

CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 128 RAM (kByte) 32 ADC type 12-bit SAR Features AES encryption, Comparator, DAC, DMA, MATHACL, NPU, RTC, USB 2.0 UART 3 Number of ADC channels 26 SPI 2 USB USB 2.0 Hardware accelerators TinyEngine™ NPU Edge AI enabled Edge AI Studio enabled, NPU accelerated, Yes Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface LIN, SPI, UART, USB Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 128 Number of GPIOs 15, 19, 23, 27, 43, 59 Number of I2Cs 1 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 128 RAM (kByte) 32 ADC type 12-bit SAR Features AES encryption, Comparator, DAC, DMA, MATHACL, NPU, RTC, USB 2.0 UART 3 Number of ADC channels 26 SPI 2 USB USB 2.0 Hardware accelerators TinyEngine™ NPU Edge AI enabled Edge AI Studio enabled, NPU accelerated, Yes Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface LIN, SPI, UART, USB Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 128 Number of GPIOs 15, 19, 23, 27, 43, 59 Number of I2Cs 1 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
LQFP (PM) 64 144 mm² 12 x 12
  • Core
    • Arm 32-bit Cortex-M0+ CPU with memory protection unit, frequency up to 80 MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 128KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates
    • 8KB data flash bank with ECC protection
    • Up to 32kB SRAM with ECC protection or hardware parity
  • High-performance analog peripherals
    • One 12-bit 1.6Msps analog-to-digital converter (ADC) with up to 26 external channels
      • Configurable 1.6Msps with VREF1 or 0.9Msps with VREF2
      • 14-bit effective resolution at 100ksps with hardware averaging
    • One high-speed comparator (COMP) with integrated 8-bit reference DAC
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • Programmable analog connections between ADC and COMP
    • Two voltage references (VREF)
      • VREF1: Configurable 1.4V or 2.5V internal voltage reference (with external VREF cap)
      • VREF2: Configurable 1.4V or 2.5V internal voltage reference (cap-less)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 103µA/MHz (CoreMark)
    • SLEEP: 34µA/MHz
    • STOP: 199µA at 4MHz
    • STANDBY: 1.5µA at 32kHz with RTC and full SRAM and state retention
    • SHUTDOWN: 88nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • TinyEngineTM Neural Processing Unit (NPU)
      • Highly Optimized for Deep Convolutional Neural Networks (CNN)
      • Variable weights and data lengths
        • 8-bit, 4-bit, and 2-bit weights
        • 8-bit and 4-bit data
      • 2.56GOPS (Giga Operations Per Second) at 80MHz
      • Edge AI Model examples such as:
        • Generic time-series classification example
        • Arc fault (AFCI) example
        • Motor fault example
        • Electrocardiogram (ECG) example
    • Four timers support up to 14 PWM channels
      • Two 16-bit general-purpose timers
      • One 16-bit general-purpose timer supports low-power operation in STANDBY mode
      • One 16-bit advanced timer with deadband support and complimentary outputs up to 8 PWM channels
    • One basic software timer including 4 independent configurable 16-bit counters
      • Ability to daisy-chain 2 of the 16-bit counters to form a 32-bit counter
      • Ability to generate 2x interrupt driven PWMs
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Four configurable serial interfaces (UNICOMM)
      • Two supporting UART (LIN) or I2C (SMBus/PMBus)
      • One supporting UART or SPI
      • One supporting SPI interface up to 32Mbits/s
    • One USB2.0 interface supports full-speed (12-Mbps) compliant device and host mode functionality
      • Crystal-less USB device operation
      • Up to 8 bi-directional endpoints
    • One digital audio interface supporting several standardized serial interfaces to audio device
      • Transfer modes support
        • Controller transmitter / receiver
        • Target transmitter / receiver
      • Formats support
        • Standard (UM11732) I2S
        • Codec LSB / MSB Justified
        • DSP serial interface format that supports up to eight audio channels per data pin
        • PCM (short and long frame)
        • TDM Classic/I2S/Left Justified/Right Justified Formats up to 8 slots per frame
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80 MHz
    • Internal 60MHz USB FLL oscillator with ±0.25% accuracy
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Security
    • AES accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 59 total GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Two high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 32-pin VQFN (RHB) (0.5mm pitch)
    • 28-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 28-pin WQFN (RUY) (0.4mm pitch)
    • 24-pin VQFN (RGE) (0.5mm pitch)
    • 20-pin VSSOP (DGS) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G5187: 128KB flash, 32KB RAM, TinyEngineTM NPU
  • Development kits and software (also see Tools and Software)
  • Core
    • Arm 32-bit Cortex-M0+ CPU with memory protection unit, frequency up to 80 MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 128KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates
    • 8KB data flash bank with ECC protection
    • Up to 32kB SRAM with ECC protection or hardware parity
  • High-performance analog peripherals
    • One 12-bit 1.6Msps analog-to-digital converter (ADC) with up to 26 external channels
      • Configurable 1.6Msps with VREF1 or 0.9Msps with VREF2
      • 14-bit effective resolution at 100ksps with hardware averaging
    • One high-speed comparator (COMP) with integrated 8-bit reference DAC
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • Programmable analog connections between ADC and COMP
    • Two voltage references (VREF)
      • VREF1: Configurable 1.4V or 2.5V internal voltage reference (with external VREF cap)
      • VREF2: Configurable 1.4V or 2.5V internal voltage reference (cap-less)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 103µA/MHz (CoreMark)
    • SLEEP: 34µA/MHz
    • STOP: 199µA at 4MHz
    • STANDBY: 1.5µA at 32kHz with RTC and full SRAM and state retention
    • SHUTDOWN: 88nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • TinyEngineTM Neural Processing Unit (NPU)
      • Highly Optimized for Deep Convolutional Neural Networks (CNN)
      • Variable weights and data lengths
        • 8-bit, 4-bit, and 2-bit weights
        • 8-bit and 4-bit data
      • 2.56GOPS (Giga Operations Per Second) at 80MHz
      • Edge AI Model examples such as:
        • Generic time-series classification example
        • Arc fault (AFCI) example
        • Motor fault example
        • Electrocardiogram (ECG) example
    • Four timers support up to 14 PWM channels
      • Two 16-bit general-purpose timers
      • One 16-bit general-purpose timer supports low-power operation in STANDBY mode
      • One 16-bit advanced timer with deadband support and complimentary outputs up to 8 PWM channels
    • One basic software timer including 4 independent configurable 16-bit counters
      • Ability to daisy-chain 2 of the 16-bit counters to form a 32-bit counter
      • Ability to generate 2x interrupt driven PWMs
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Four configurable serial interfaces (UNICOMM)
      • Two supporting UART (LIN) or I2C (SMBus/PMBus)
      • One supporting UART or SPI
      • One supporting SPI interface up to 32Mbits/s
    • One USB2.0 interface supports full-speed (12-Mbps) compliant device and host mode functionality
      • Crystal-less USB device operation
      • Up to 8 bi-directional endpoints
    • One digital audio interface supporting several standardized serial interfaces to audio device
      • Transfer modes support
        • Controller transmitter / receiver
        • Target transmitter / receiver
      • Formats support
        • Standard (UM11732) I2S
        • Codec LSB / MSB Justified
        • DSP serial interface format that supports up to eight audio channels per data pin
        • PCM (short and long frame)
        • TDM Classic/I2S/Left Justified/Right Justified Formats up to 8 slots per frame
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80 MHz
    • Internal 60MHz USB FLL oscillator with ±0.25% accuracy
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Security
    • AES accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 59 total GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Two high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 32-pin VQFN (RHB) (0.5mm pitch)
    • 28-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 28-pin WQFN (RUY) (0.4mm pitch)
    • 24-pin VQFN (RGE) (0.5mm pitch)
    • 20-pin VSSOP (DGS) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G5187: 128KB flash, 32KB RAM, TinyEngineTM NPU
  • Development kits and software (also see Tools and Software)

MSPM0G5187 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring up to 128KB of flash memory in small packages or high pin count packages (up to 64 pins). These devices include a TinyEngineTM NPU,USB2.0-FS interface,digital audio interface, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

Up to 128KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB SRAM with ECC and parity protection is provided. The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

TI’s TinyEngineTM NPU is an integrated accelerator module used to enhance fast, secure AI at the edge with sensing, processing, and control applications within MSPM0 platform.

A USB 2.0 full-speed interface (with integrated PHY, clock source, and termination resistors) is provided to support compliant host-mode and crystal-less device-mode functionality. Four configurable serial interface modules (UNICOMM) are provided, supporting up to three UART, two I2C, or two SPI. A digital audio interface is provided for a variety of audio applications and support multiple protocols such as I2S and TDM.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as one sampling 12-bit 1.6Msps ADCs supporting up to 26 external channels, two on-chip voltage references (1.4V or 2.5V), and one high speed comparator with built-in 8-bit reference DAC.

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G5187 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual.

MSPM0G5187 microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring up to 128KB of flash memory in small packages or high pin count packages (up to 64 pins). These devices include a TinyEngineTM NPU,USB2.0-FS interface,digital audio interface, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

Up to 128KB of embedded flash program memory with built-in error correction code (ECC) and up to 32KB SRAM with ECC and parity protection is provided. The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

TI’s TinyEngineTM NPU is an integrated accelerator module used to enhance fast, secure AI at the edge with sensing, processing, and control applications within MSPM0 platform.

A USB 2.0 full-speed interface (with integrated PHY, clock source, and termination resistors) is provided to support compliant host-mode and crystal-less device-mode functionality. Four configurable serial interface modules (UNICOMM) are provided, supporting up to three UART, two I2C, or two SPI. A digital audio interface is provided for a variety of audio applications and support multiple protocols such as I2S and TDM.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as one sampling 12-bit 1.6Msps ADCs supporting up to 26 external channels, two on-chip voltage references (1.4V or 2.5V), and one high speed comparator with built-in 8-bit reference DAC.

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0G5187 MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet MSPM0G5187 Mixed-Signal Microcontrollers With TinyEngineTM NPU datasheet (Rev. B) PDF | HTML 03 Mär 2026
* Errata MSPM0G5187, MSPM0G511x Mixed-Signal Microcontrollers Errata PDF | HTML 11 Aug 2025
* User guide MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. C) 19 Aug 2025
Application note USB Design with MSPM0 MCUs PDF | HTML 02 Mär 2026
Application brief Improving Arc Fault Detection with Log Amplifier PDF | HTML 20 Jan 2026

Design und Entwicklung

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