DS90LV031A

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3-V-LVDS-Vierfach-CMOS-Differenzialleitungstreiber

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Datenblatt

document-pdfAcrobat DS90LV031A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) (Englisch) PDF | HTML

DS90LV031A

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Function

Driver

Protocols

LVDS

Number of transmitters

4

Number of receivers

0

Signaling rate (Mbps)

400

Input signal

LVCMOS, LVTTL

Output signal

LVDS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Function

Driver

Protocols

LVDS

Number of transmitters

4

Number of receivers

0

Signaling rate (Mbps)

400

Input signal

LVCMOS, LVTTL

Output signal

LVDS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (D)

16

59.4 mm² (9.9 mm × 6 mm)

TSSOP (PW)

16

32 mm² (5 mm × 6.4 mm)

>400-Mbps (200-MHz) Switching Rates
0.1-ns Typical Differential Skew
0.4-ns Maximum Differential Skew
2-ns Maximum Propagation Delay
3.3-V Power Supply Design
±350-mV Differential Signaling
Low Power Dissipation (13-mW at 3.3-V Static)
Interoperable With Existing 5-V LVDS Devices
Compatible With IEEE 1596.3 SCI LVDS Standard
Compatible With TIA/EIA-644 LVDS Standard
Industrial Operating Temperature Range
Available in SOIC and TSSOP Surface-Mount Packaging

>400-Mbps (200-MHz) Switching Rates
0.1-ns Typical Differential Skew
0.4-ns Maximum Differential Skew
2-ns Maximum Propagation Delay
3.3-V Power Supply Design
±350-mV Differential Signaling
Low Power Dissipation (13-mW at 3.3-V Static)
Interoperable With Existing 5-V LVDS Devices
Compatible With IEEE 1596.3 SCI LVDS Standard
Compatible With TIA/EIA-644 LVDS Standard
Industrial Operating Temperature Range
Available in SOIC and TSSOP Surface-Mount Packaging

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE^® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE^® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Format-Optionen	Datum
*	Datenblatt	DS90LV031A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D)	PDF \| HTML	25.08.2016
	Anwendungshinweis	AN-1110 LVDS Quad Dynamic I CC vs Frequency		15.05.2004
	Anwendungshinweis	An Overview of LVDS Technology		05.10.1998

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