DS90LV018A

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LVDS-CMOS-Einzel-Differenzleitungsempfänger, 3 V

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Datenblatt

document-pdfAcrobat DS90LV018A 3V LVDS Single CMOS Differential Line Receiver datasheet (Rev. D) (Englisch)

DS90LV018A

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Function

Receiver

Protocols

LVDS

Number of transmitters

0

Number of receivers

1

Signaling rate (Mbps)

400

Input signal

LVDS

Output signal

CMOS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Function

Receiver

Protocols

LVDS

Number of transmitters

0

Number of receivers

1

Signaling rate (Mbps)

400

Input signal

LVDS

Output signal

CMOS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (D)

8

29.4 mm² (4.9 mm × 6 mm)

>400 Mbps (200 MHz) Switching Rates
50 ps Differential Skew (Typical)
2.5 ns Maximum Propagation Delay
3.3V Power Supply Design
Flow-Through Pinout
Power Down High Impedance on LVDS Inputs
Low Power Design (18mW @ 3.3V Static)
Interoperable with Existing 5V LVDS Networks
Accepts Small Swing (350 mV Typical) Differential Signal Levels
Supports Open, Short and Terminated Input Fail-Safe
Conforms to ANSI/TIA/EIA-644 Standard
Industrial Temperature Operating Range
- (−40°C to +85°C)
Available in SOIC Package

All trademarks are the property of their respective owners.

>400 Mbps (200 MHz) Switching Rates
50 ps Differential Skew (Typical)
2.5 ns Maximum Propagation Delay
3.3V Power Supply Design
Flow-Through Pinout
Power Down High Impedance on LVDS Inputs
Low Power Design (18mW @ 3.3V Static)
Interoperable with Existing 5V LVDS Networks
Accepts Small Swing (350 mV Typical) Differential Signal Levels
Supports Open, Short and Terminated Input Fail-Safe
Conforms to ANSI/TIA/EIA-644 Standard
Industrial Temperature Operating Range
- (−40°C to +85°C)
Available in SOIC Package

All trademarks are the property of their respective owners.

The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Datum
*	Datenblatt	DS90LV018A 3V LVDS Single CMOS Differential Line Receiver datasheet (Rev. D)	16.04.2013
	Application brief	How Far, How Fast Can You Operate LVDS Drivers and Receivers?	03.08.2018
	Application brief	DACx1416 Delivers Optimized Solution to Mach Zehnder Modulator Biasing	29.06.2018
	Anwendungshinweis	An Overview of LVDS Technology	05.10.1998

Design und Entwicklung

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Evaluierungsplatine

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