TVP7000 不推荐用于新设计。
TVP7002 正在供货 三路 8/10 位 165/110MSPS 视频 ADC This device is an updated revision.



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  • Analog Channels
    • -6 dB to 6 dB Analog Gain
    • Analog Input MUXs
    • Auto Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, PGA, and ADC
    • Clamping: Selectable Clamping Between Bottom Level and Mid-level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • PGA: 8-Bit Programmable Gain Amplifier
    • ADC: 8/10-Bit 150/110 MSPS A/D Converter
    • Automatic Level Control Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From GreenLuminance Channel
    • Support for DC and AC-Coupled Input Signals
  • PLL
    • Fully Integrated Analog PLL for Pixel Clock Generation
    • 12-150 MHz Pixel Clock Generation From HSYNC Input
    • Adjustable PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving TQFP-100 Pin Package
    • Thermally-Enhanced PowerPAD™ Package for Better Heat Dissipation
    • LCD TV/Monitors/Projectors
    • DLP TV/Projectors
    • PDP TV/Monitors
    • PCTV Set-Top Boxes
    • Digital Image Processing
    • Video Capture/Video Editing
    • Scan Rate/Image Resolution Converters
    • Video Conferencing
    • Video/Graphics Digitizing Equipment

PowerPAD is a trademark of Texas Instruments.

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TVP7000 is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 150 MHz. Therefore, it can be used for PC graphics digitizing up to the VESA standard of SXGA (1280 × 1024) resolution at 75 Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080p. TVP7000 can be used to digitize CVBS and S-Video signal with 10-bit ADCs.

The TVP7000 is powered from 3.3-V and 1.8-V supply and integrates a triple high-performance A/D converter with clamping functions and variable gain, independently programmable for each channel. The clamping timing window is provided by an external pulse or can be generated internally. The TVP7000 includes analog slicing circuitry on the Y or G input to support sync-on-luminance or sync-on-green extraction. In addition, TVP7000 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

TVP7000 also contains a complete analog PLL block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 150 MHz.

All programming of the part is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP7000 is available in a space-saving TQFP 100-pin PowerPAD package.

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= 特色
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类型 标题 下载最新的英文版本 发布
* 数据表 Triple 8/10-Bit 150/110 MSPS Video & Graphics Digitizer w/Analog PLL 数据表 2005年 9月 22日
更多文献资料 Technical details on the TVP7000 and TVP7001 devices 2005年 11月 1日
应用手册 TVP7000EVM Quick Start Guide 2005年 9月 30日
用户指南 TVP7000EVM User's Guide 2005年 9月 29日
更多文献资料 TVP7000 EVM Cover Letter 2005年 9月 28日




支持软件 下载
SLEC005.ZIP (5057 KB)


仿真工具 下载
document-generic 用户指南 document-generic 下载英文版本 (Rev.A)


封装 引脚 下载
HTQFP (PZP) 100 了解详情



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