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Design Rule Verification Report

Date : 11/5/2014
Time : 12:28:30 PM
Elapsed Time : 00:00:06
Filename : \\dataserver\pcb\PCB-BLR\TEMPORARY WORKS\balamurali\TIDA-00110_20141008\TIDA-00110_20141008\TIDA-00110.PcbDoc
Warnings : 0
Rule Violations : 6

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=7.7mil) (InPadClass('Less Than 7.7')),(InPadClass('Less Than 7.7')) 0
Clearance Constraint (Gap=25mil) (InPolygon),(InPolygon) 0
Clearance Constraint (Gap=8mil) (IsVia),(IsVia) 0
Clearance Constraint (Gap=8mil) (IsVia),(IsSMTPin) 0
Clearance Constraint (Gap=20mil) (OnCopper and InComponentClass('Mounting Holes')),(IsKeepOut) 0
Clearance Constraint (Gap=15mil) (InPolygon),(IsTrack and IsVia and IsSMTPin and IsThruPin) 0
Clearance Constraint (Gap=8mil) (All),(All) 0
Width Constraint (Min=8mil) (Max=100mil) (Preferred=20mil) (InNetClass('PWR')) 0
Width Constraint (Min=6mil) (Max=100mil) (Preferred=8mil) (All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=10mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Routing Layers(All) 0
Routing Via (MinHoleWidth=12mil) (MaxHoleWidth=20mil) (PreferredHoleWidth=16mil) (MinWidth=24mil) (MaxWidth=40mil) (PreferedWidth=32mil) (InNetClass('PWR')) 0
Routing Via (MinHoleWidth=7.874mil) (MaxHoleWidth=12.992mil) (PreferredHoleWidth=7.874mil) (MinWidth=19.685mil) (MaxWidth=23.622mil) (PreferedWidth=19.685mil) (IsVia and InAnyComponent) 0
Routing Via (MinHoleWidth=12mil) (MaxHoleWidth=20mil) (PreferredHoleWidth=12mil) (MinWidth=24mil) (MaxWidth=40mil) (PreferedWidth=24mil) (InNetClass('All Nets')) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 6
Un-Routed Net Constraint ( (All) ) 0
Minimum Annular Ring (Minimum=5.905mil) (IsVia and InAnyComponent) 0
Minimum Annular Ring (Minimum=6mil) (All) 0
Hole To Hole Clearance (Gap=10mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Width Constraint (Min=8mil) (Max=10mil) (Preferred=8mil) (InDifferentialPair('J1')) 0
Clearance Constraint (Gap=1mil) (InPolygon),(IsKeepOut) 0
Total 6

Short-Circuit Constraint (Allowed=No) (All),(All)
Region (0 hole(s)) Top Layer Pad FID3-1(3043.307mil,1671.664mil) Top Layer
Region (0 hole(s)) Top Layer Pad FID2-1(3043.307mil,100mil) Top Layer
Region (0 hole(s)) Top Layer Pad FID1-1(500mil,1671.653mil) Top Layer
Region (0 hole(s)) Bottom Layer Pad FID4-1(500mil,1671.673mil) Bottom Layer
Region (0 hole(s)) Bottom Layer Pad FID6-1(3043.307mil,1671.664mil) Bottom Layer
Region (0 hole(s)) Bottom Layer Pad FID5-1(3043.307mil,100mil) Bottom Layer
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