# 07 Dec 2022 11:51 AM
#
CNSA_NET_TYPE_PHYSICAL_PARAMS {
    constr_area = *
    net_type = *
    layers = *
    min_line_width = 0.006000
    min_neck_width = 0.006000
    max_line_length = 0.006000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI2-D0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.005000
    dpair_phase_tolerance_pl = 0.005000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-A11
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MIPI-TRC-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = MIPI-TRC-CTL
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI0-CLK-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.005000
    dpair_phase_tolerance_pl = 0.005000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-A0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-A14-WEN
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-CKE1
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-CLK
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002500
    dpair_phase_tolerance_pl = 0.002500
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-CLKP
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002500
    dpair_phase_tolerance_pl = 0.002500
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-CSN
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-CS1N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = DDR-ACTN
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = CSI1-D0-N
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.005000
    dpair_phase_tolerance_pl = 0.005000
}

NET_ELECTRICAL_PARAMS {
    ecset_name = OLD
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.002500
    dpair_phase_tolerance_pl = 0.002500
}

NET_ELECTRICAL_PARAMS {
    ecset_name = SOC-OSPI-DQ0
    dpair_prim_gap = 0.000000
    dpair_line_width = 0.000000
    dpair_neck_gap = 0.000000
    dpair_neck_width = 0.000000
    dpair_coupled_tol_min = 0.000000
    dpair_coupled_tol_pl = 0.000000
    dpair_minimum_spacing = 0.000000
    dpair_gather_control = 0.000000
    dpair_max_uncoupled_len = 0.000000
    dpair_phase_control = 0.000000
    dpair_phase_tolerance_min = 0.000000
    dpair_phase_tolerance_pl = 0.000000
}

NET_ECSET_ENTRY {
    net_name = CSI1_CLK_N
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_CLK_P
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D0_N
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D0_P
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D1_N
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D1_P
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D2_N
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D2_P
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D3_N
    ecset_name = CSI1-D0-N
}

NET_ECSET_ENTRY {
    net_name = CSI1_D3_P
    ecset_name = CSI1-D0-N
}

