SNAS866
December 2023
LMX1214
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Timing Diagram
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.1.1
Range of Dividers
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Power-On Reset
6.3.2
Temperature Sensor
6.3.3
Clock Outputs
6.3.3.1
Clock Output Buffers
6.3.3.2
Clock MUX
6.3.3.3
Clock Divider
6.3.4
AUXCLK Output
6.3.4.1
AUXCLKOUT Output Format
6.3.4.2
AUXCLK_DIV_PRE and AUXCLK_DIV Dividers
6.3.5
SYNC Input Pins
6.3.5.1
SYNC Pins Common-Mode Voltage
6.3.5.2
Windowing Feature
6.4
Device Functional Modes Configurations
6.4.1
Pin Mode Control
7
Application and Implementation
7.1
Applications Information
7.1.1
SYNC Input Configuration
7.1.2
Treatment of Unused Pins
7.1.3
Current Consumption
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Plots
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
7.5
Register Map
7.5.1
Device Registers
8
Device and Documentation Support
8.1
Device Support
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHA|40
MPQF135D
Thermal pad, mechanical data (Package|Pins)
RHA|40
QFND650
Orderable Information
snas866_oa
snas866_pm
Data Sheet
LMX1214 Low-Noise, High-Frequency Buffer and Divider