In the digital power or industrial drive applications, multiple phase topologies are much more popular with the increasing power level requirement. Even for the same power level, compared with the single power stage, using multiple converters in parallel can generally bring the below benefits:

• Better efficiency with lower conduction loss, by averaging the whole current on different modules
• Lower voltage/current ripples with interleaved control

However, the control for multiple phase applications will be more complicated, considering how to manage time-base synchronization and maintain correct phase relationship among different ePWM modules. Building on 20 years of real-time control expertise, C2000 microcontrollers have developed lots of dedicated features in ePWM peripheral to handle the proper control for multiple phase applications. In this report, it will address how to better use the new features in Generation 3 devices(F2838x, F2837x, F2807x, F28004x, F28002x), including load on sync, simultaneous writes, global load and one shot reload. For a list of all devices with an ePWM module of the same type, to determine the differences between the types, and for a list of device-specific differences within a type, see the C2000 Real-Time Control MCU Peripherals Reference Guide.

For a typical multiple phase power converter, there are two factors shown below, which require careful consideration.

• Proper phase control

  Each ePWM module can be configured to allow a SyncIn pulse to cause the phase register (TBPHS) contents to be loaded into the time-base counter (TBCTR). Thus, by programming appropriate values into TBPHS, multiple PWM modules can address some power topologies that rely on phase relationship between legs (or stages) for correct operation, like interleaved PFC, interleaved LLC, and so forth. Basically, the phase relationship for N phases by setting the TBPHS values can be given with the following formula shown in Equation 1.

  Equation 1. TBPHS(N,M) = (TBPRD/N) x (M-1)

  where, N = number of phases M = PWM module number.

  For example, for the 3-phase case (N=3), TBPRD = 600; TBPHS(3,2) = (600/3) x (2-1) = 200 (that is, Phase value for sync receiver module 2); TBPHS(3,3) = 400 (that is, Phase value for sync receiver module 3).

  Figure 2-1 shows the associated timing waveforms for this phase relationship of 120°, and both sync receiver modules are synchronized to the sync source module.

  Figure 2-1 Timing Waveforms Associated With Phase Control Between Three Modules
• Update the registers across multiple ePWM modules properly

  In the actual applications, it is common that the EPWM outputs will change as required by the control loop, like variable duty cycles, frequencies, and so forth. It is critical to maintain the same phase relationship and synchronization among different ePWM modules after the change. Generally, in order to avoid corruption or spurious operation due to the register being asynchronously modified by software, shadow registers are enabled. The shadow register buffers or provides a temporary holding location for the active register. Users are responsible to select an event, when the shadow register's content will be transferred to the active register, which controls the hardware actions.

In the previous generation C2000 devices, with Type 0 or Type 1 ePWM, the shadow register contents are transferred to the active register (TBPRD (Active) ← TBPRD (shadow)) when the time-base counter equals zero (TBCTR = 0x0000). It might cause the phase mismatch issue during variable frequency applications.

Figure 2-2 shows one example with 2 phase interleaved control, using 120° phase shift between ePWM1 and ePWM2 modules. And the ePWM1_ZERO event is selected as the SyncIn pulse for ePWM2. Assuming the ISR, to change the frequency, occurs between the ePWM1_ZERO event and ePWM2_ZERO event, and the TBPRD shadow registers of both ePWM1 and ePWM2 are updated with the new period value (1200), and TBPHS of ePWM2 is updated with 400 immediately. As shown in the waveforms, since the active TBPRD value can not be updated until the next ePWM2_ZERO event, so the phase shift relation is incorrect right after the frequency changes. Even worse, if the new TBPHS value of ePWM2 is larger than the previous period register value, it might cause unpredictable results when the TBCTR is loaded with this value at SyncIn event. As a result, the time-base counter keeps counting up beyond the period register value and goes all the way until it eventually rolls over.

Figure 2-2 Phase Control Limitation With the Previous Generation C2000 Devices

The above risk has been resolved from Type 2 ePWM, which enables a sync event additionally, as determined by the TBCTL2[PRDLDSYNC] bit, to make the shadow to action loading effective for TBPRD and CMP registers. In this way, the correct phase shift can be obtained as shown in Figure 2-3.

Figure 2-3 Correct Phase Shift Control With Shadow to Active Load at Sync Event