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  • TPS6286x1EVM-109 Evaluation Module

    • SLUUCD1A April   2020  – April 2022 TPS62860

       

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  • TPS6286x1EVM-109 Evaluation Module
  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification
    3. 1.3 Modifications
      1. 1.3.1 IC U1 Operation
  3. 2Setup
    1. 2.1 Input and Output Connector Description
      1. 2.1.1  J1, Pin 1 and 2 – VIN
      2. 2.1.2  J1, Pin 3 and 4 – S+/S-
      3. 2.1.3  J1, Pin 5 and 6 – GND
      4. 2.1.4  J2, Pin 1 and 2 – VOUT
      5. 2.1.5  J2, Pin 3 and 4 – S+/S-
      6. 2.1.6  J2, Pin 5 and 6 – GND
      7. 2.1.7  JP1 – EN
      8. 2.1.8  JP3 – VSEL1
      9. 2.1.9  JP4 - VSEL2
      10. 2.1.10 JP5 – PG
    2. 2.2 Setup
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History
  7. IMPORTANT NOTICE
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USER'S GUIDE

TPS6286x1EVM-109 Evaluation Module

Trademarks

All trademarks are the property of their respective owners.

1 Introduction

The TPS6286x1 is a synchronous, step-down converter in a 0.7-mm × 1.4-mm × 0.4-mm wafer chip-scale package (WCSP). The BSR109 EVMs support different IC version TPS62860 and TPS62861 families.

 

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