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  • bq2415x Fully Integrated Switch-Mode One-Cell Li-Ion Charger With Full USB Compliance and USB-OTG Support

    • SLUSAB0D October   2010  – April 2016 BQ24153A , BQ24156A , BQ24158 , BQ24159

      UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  • CONTENTS
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  • bq2415x Fully Integrated Switch-Mode One-Cell Li-Ion Charger With Full USB Compliance and USB-OTG Support
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Device Comparisons
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage Protection
        1. 9.3.1.1 Input Overvoltage Protection
        2. 9.3.1.2 Bad Adaptor Detection/Rejection
        3. 9.3.1.3 Sleep Mode
        4. 9.3.1.4 Input Voltage Based DPM (Special Charger Voltage Threshold)
      2. 9.3.2 Battery Protection
        1. 9.3.2.1 Output Overvoltage Protection
        2. 9.3.2.2 Battery Short Protection
        3. 9.3.2.3 Battery Detection at Power Up in 15-minute Mode (bq24153A/6A only)
        4. 9.3.2.4 Battery Detection in Host Mode
      3. 9.3.3 15-Minute Safety Timer and 32-second Watchdog Timer in Charge Mode
      4. 9.3.4 USB Friendly Power Up
      5. 9.3.5 Input Current Limiting at Power Up
    4. 9.4 Device Functional Modes
      1. 9.4.1 Charge Mode Operation
        1. 9.4.1.1 Charge Profile
      2. 9.4.2 PWM Controller in Charge Mode
      3. 9.4.3 Battery Charging Process
      4. 9.4.4 Thermal Regulation and Protection
      5. 9.4.5 Charge Status Output, STAT Pin
      6. 9.4.6 Control Bits in Charge Mode
        1. 9.4.6.1 CE Bit (Charge Mode)
        2. 9.4.6.2 RESET Bit
        3. 9.4.6.3 OPA_Mode Bit
      7. 9.4.7 Control Pins in Charge Mode
        1. 9.4.7.1 CD Pin (Charge Disable)
        2. 9.4.7.2 SLRST Pin (Safety Limit Register 06H Reset, bq24156A/9 only)
      8. 9.4.8 BOOST Mode Operation (bq24153A/8 only)
        1. 9.4.8.1 PWM Controller in Boost Mode
        2. 9.4.8.2 Boost Start Up
        3. 9.4.8.3 PFM Mode at Light Load
        4. 9.4.8.4 Safety Timer in Boost Mode
        5. 9.4.8.5 Protection in Boost Mode
          1. 9.4.8.5.1 Output Overvoltage Protection
          2. 9.4.8.5.2 Output Overload Protection
          3. 9.4.8.5.3 Battery Overvoltage Protection
        6. 9.4.8.6 STAT Pin in Boost Mode
      9. 9.4.9 High Impedance (HI-Z) Mode
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
        1. 9.5.1.1 F/S Mode Protocol
        2. 9.5.1.2 H/S Mode Protocol
        3. 9.5.1.3 I2C Update Sequence
        4. 9.5.1.4 Slave Address Byte
        5. 9.5.1.5 Register Address Byte
    6. 9.6 Register Maps
      1. 9.6.1 Status/Control Register [Memory Location: 00, Reset State: x1xx 0xxx]
      2. 9.6.2 Control Register [Memory Location: 01, Reset State: 0011 0000]
      3. 9.6.3 Control/Battery Voltage Register [Memory Location: 02, Reset State: 0000 1010]
      4. 9.6.4 Vender/Part/Revision Register [Memory Location: 03, Reset State: 0101 000x]
      5. 9.6.5 Battery Termination/Fast Charge Current Register [Memory Location: 04, Reset State: 0000 000]
      6. 9.6.6 Special Charger Voltage/Enable Pin Status Register [Memory location: 05, Reset state: 001X X100]
      7. 9.6.7 Safety Limit Register [Memory location: 06, Reset state: 01000000]
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Systems Design Specifications
        2. 10.2.2.2 Charge Current Sensing Resistor Selection Guidelines
        3. 10.2.2.3 Output Inductor and Capacitance Selection Guidelines
      3. 10.2.3 Application Curves
    3. 10.3 System Example
  11. 11Power Supply Recommendations
    1. 11.1 System Load After Sensing Resistor
    2. 11.2 System Load Before Sensing Resistor
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Current Path
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Summary
      1. 14.1.1 Chip Scale Packaging Dimensions
  15. IMPORTANT NOTICE
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DATA SHEET

bq2415x Fully Integrated Switch-Mode One-Cell Li-Ion Charger With Full USB Compliance and USB-OTG Support

1 Features

  • Charge Faster than Linear Chargers
  • High-Accuracy Voltage and Current Regulation
    • Input Current Regulation Accuracy: ±5% (100 mA and 500 mA)
    • Charge Voltage Regulation Accuracy: ±0.5% (25°C), ±1% (0°C to 125°C)
    • Charge Current Regulation Accuracy: ±5%
  • Input Voltage Based Dynamic Power Management (VIN DPM)
  • Bad Adaptor Detection and Rejection
  • Safety Limit Register for Maximum Charge Voltage and Current Limiting
  • High-Efficiency Mini-USB/AC Battery Charger for Single-Cell Li-Ion and Li-Polymer Battery Packs
  • 20-V Absolute Maximum Input Voltage Rating
  • 9-V Maximum Operating Input Voltage-bq24156A/9
  • 6-V Maximum Operating Input Voltage-bq24153A/8
  • Built-In Input Current Sensing and Limiting
  • Integrated Power FETs for Up To 1.55-A Charge Rate
  • Programmable Charge Parameters through I2C™ Compatible Interface (up to 3.4 Mbps):
    • Input Current Limit
    • VIN DPM Threshold
    • Fast-Charge/Termination Current
    • Charge Regulation Voltage (3.5 V to 4.44 V)
    • Low Charge Current Mode Enable/Disable
    • Safety Timer with Reset Control
    • Termination Enable/Disable
  • Support up to 1.55 A Charge Current Using 55-mΩ Sensing Resistor
  • Synchronous Fixed-Frequency PWM Controller Operating at 3 MHz With 0% to 99.5% Duty Cycle
  • Automatic High Impedance Mode for Low Power Consumption
  • Robust Protection
    • Reverse Leakage Protection Prevents Battery Drainage
    • Thermal Regulation and Protection
    • Input/Output Overvoltage Protection
  • Status Output for Charging and Faults
  • USB Friendly Boot-Up Sequence
  • Automatic Charging
  • Power Up System without Battery bq24158/9
  • Boost Mode Operation for USB OTG: (bq24153A/8 only)
    • Input Voltage Range (from Battery): 2.5 V to 4.5 V
    • Output for VBUS: 5.05 V/ 200 mA
  • 2.1 mm x 2 mm 20-Pin WCSP Package

2 Applications

  • Mobile and Smart Phones
  • MP3 Players
  • Handheld Devices

3 Description

The bq24153A/6A/8/9 is a compact, flexible, high-efficiency, USB-friendly switch-mode charge management device for single-cell Li-ion and Li-polymer batteries used in a wide range of portable applications. The charge parameters can be programmed through an I2C interface. The IC integrates a synchronous PWM controller, power MOSFETs, input current sensing, high-accuracy current and voltage regulation, and charge termination, into a small WCSP package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
bq24153A, bq24156A,
bq24158, bq24159		 20-Pin WCSP 2.1 mm x 2 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Application Circuit

bq24153A bq24156A bq24158 bq24159 pg1_app_cir2_lusab0.gif

4 Revision History

Changes from C Revision (July 2013) to D Revision

  • Added the Device Information table, ESD Ratings table, Detailed Description section, Application and Implementation section, Power Supply Recommendation section, Layout section, Device and Documentation Support section, and the Mechanical, Packaging, and Orderable Information sectionGo
  • Changed Features bullet From: "...1.5-A Charge Rate" To: "...1.55-A Charge Rate"Go
  • Added Features bullet: "Support up to 1.55A......Sensing Resistor "Go
  • Added information to the Device Comparisons table.Go
  • Changed t32S in the Timing Requirements table, PROTECTION section, MAX value From: 32s To 40s Go
  • Added information to bullet note at Table 9 for clarification. Go

Changes from B Revision (August 2012) to C Revision

  • Changed Boot capacitor value from 10 nF to 33 nF in Typical Application CircuitGo
  • Changed BOOT capacitor value from 10 nF to 33 nF in Pin Functions DescriptionGo
  • Changed CBOOT capacitor value from 10 nF to 33 nF in Figure 25 and Figure 36 Go

Changes from A Revision (February 2012) to B Revision

  • Changed the revision to Rev B, August 2012Go
  • Deleted the last sentence in the PIN Functions table: Name CD, in the description columnGo
  • Changed IO(CHARGE) Test Conditions statement from "V(LOWV)" to "V(SHORT)"Go
  • Deleted from the CD Pin (Charge Disable) section the last sentence: In 15-minute....32-second timer.Go

Changes from * Revision (October 2010) to A Revision

  • Added bq24159 throughout this data sheet.Go
  • Changed the Device Comparisons tableGo

5 Description (Continued)

The IC charges the battery in three phases: conditioning, constant current and constant voltage. The input current is automatically limited to the value set by the host. Charge is terminated based on battery voltage and user-selectable minimum current level. A safety timer with reset control provides a safety backup for I2C interface. During normal operation, The IC automatically restarts the charge cycle if the battery voltage falls below an internal threshold and automatically enters sleep mode or high impedance mode when the input supply is removed. The charge status can be reported to the host using the I2C interface. During the charging process, the IC monitors its junction temperature (TJ) and reduces the charge current once TJ increases to about 125°C. To support USB OTG device, bq24153A/8 can provide VBUS (5.05 V) by boosting the battery voltage. The IC is available in 20-pin WCSP package.

6 Device Comparisons

PART NUMBER bq24153A bq24156A bq24158 bq24159
VOVP (V) 6.5 9.8 6.5 9.8
D4 Pin Definition OTG SLRST OTG SLRST
ICHARGE(MAX) at POR in 15-minute mode with
R(SNS) = 68 mΩ (55 mΩ) and OTG=High on bq24153A/8 (mA)		 325 (402) 325 (N/A) 325 (402) 325 (N/A)
ICHARGE(MAX) in HOST mode with R(SNS) = 68 mΩ (55 mΩ) and Safety Limit Register increased from default (A) (1) 1.25 (1.55A) 1.55 (N/A) 1.25 (1.55A) 1.55(N/A)
1.55 N/A 1.55 N/A
Output regulation voltage at POR (V) 3.54 3.54 3.54 3.54
Boost Function Yes No Yes No
Input Current Limit in 15Min Mode 100mA (OTG=LOW);
500mA (OTG=High)		 500mA 100mA (OTG=LOW);
500mA (OTG=High)		 500mA
Battery Detection at Power Up Yes Yes No No
I2C Address 6BH 6AH 6AH 6AH
PN1 (bit4 of 03H) 1 0 1 0
PN0 (bit3 of 03H) 0 0 0 0
Safety Timer and WD Timer Enabled Enabled Enabled Enabled
(1) See Application Section for more explanation and calculations on using different sense resistors.

7 Pin Configuration and Functions

YFF Package
20-Pin Bump DSBGA
bq24153A bq24156A bq24158 bq24159 pins2_lusab0.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
BOOT A3 I/O Bootstrap capacitor connection for the high-side FET gate driver. Connect a 33-nF ceramic capacitor (voltage rating ≥ 10 V) from BOOT pin to SW pin.
CD E2 I Charge disable control pin. CD=0, charge is enabled. CD=1, charge is disabled and VBUS pin is high impedance to GND.
CSIN E1 I Charge current-sense input. Battery current is sensed across an external sense resistor. A 0.1-μF ceramic capacitor to PGND is required.
CSOUT E4 I Battery voltage and current sense input. Bypass it with a ceramic capacitor (minimum 0.1 μF) to PGND if there are long inductive leads to battery.
OTG
(bq24153A/8 only)		 D4 I Boost mode enable control or input current limiting selection pin. When OTG is in active status, bq24153A/8 is forced to operate in boost mode. It has higher priority over I2C control and can be disabled using the control register. At POR while in 15-min mode, the OTG pin is default to be used as the input current limiting selection pin. The I2C register is ignored at startup. When OTG=High, IIN_LIMIT=500mA and when OTG=Low, IIN_LIMIT=100mA.
PGND D1, D2, D3 Power ground
PMID B1, B2, B3 I/O Connection point between reverse blocking FET and high-side switching FET. Bypass it with a minimum of 3.3-μF capacitor from PMID to PGND.
SCL A4 I I2C interface clock. Connect a 10-kΩ pullup resistor to 1.8V rail (VAUX= VCC_HOST)
SDA B4 I/O I2C interface data. Connect a 10-kΩ pullup resistor to 1.8V rail (VAUX= VCC_HOST)
SLRST
(bq24156A/9 only)		 D4 I Safety limit register reset control. When SLRST=0, bq24156A/9 resets all the safety limits (06H) to default values, regardless of the write actions to safety limits registers (06H). When SLRST=1, bq24156A/9 can program the safety limit register until any write action to other registers locks the programmed safety limits.
STAT C4 O Charge status pin. Pull low when charge in progress. Open drain for other conditions. During faults, a 128-μs pulse is sent out. STAT pin can be disabled by the EN_STAT bit in control register. STAT can be used to drive a LED or communicate with a host processor.
SW C1, C2, C3 O Internal switch to output inductor connection.
VBUS A1, A2 I/O Charger input voltage. Bypass it with a 1-μF ceramic capacitor from VBUS to PGND. It also provides power to the load during boost mode (bq24153A/8 only) .
VREF E3 O Internal bias regulator voltage. Connect a 1µF ceramic capacitor from this output to PGND. External load on VREF is not recommended.

 
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