How to Understand LC Table and Select LC About TPS563202
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1 Introduction
TPS563202 is the next generation part of TPS563201. TPS563202 uses small SOT563 package which is 1.6mmx1.6mm and uses HotRod package technology. It has good thermal performance and stability. Table 1-1 includes the SOT563 package parts. These parts can be widely used in TV, STB, Routers, switches, AP, and so on.
| PN | Max loading | Mode | Frequency | Vref voltage | Vref accuracy At room temp |
|---|---|---|---|---|---|
| TPS563202 | 3A | ECO | 580k | 0.8 | 2% |
| TPS563207 | 3A | FCCM | 580k | 0.8 | 2% |
| TPS562202 | 2A | ECO | 580k | 0.8 | 2% |
| TPS562207 | 2A | FCCM | 580k | 0.8 | 2% |
| TPS563231 | 3A | ECO | 600k | 0.6 | 2% |
| TPS562231 | 2A | ECO | 850k | 0.6 | 2% |
| TPS563202S | 3A | ECO | 580k | 0.8 | 1.5% |
| TPS563207S | 3A | FCCM | 580k | 0.8 | 1.5% |
| TPS562202S | 2A | ECO | 580k | 0.8 | 1.5% |
| TPS562207S | 2A | FCCM | 580k | 0.8 | 1.5% |
2 The Calculation of LC
2.1 DCAP2 Topology
Application note SLVA546 gives DCAP2 topology block diagram and system function. TPS563202 employ DCAP2 topology, so it can use the way in SLVA546 to assess loop stability. DCAP2 topology block diagram as shown in Figure 2-1 and open transfer function shown in Equation 1 and Equation 2.
Figure 2-1 DCAP2 Topology Block Diagram
In Equation 1, Gdv(s) is the transfer function from Duty to Vout, HFB(s) is the transfer function of the feedback divider network from Vout to VFB, HCOMP(s) is the transfer function from VFB to Duty, Hd(s) is the delay due to fixed on time.
Equation 1 introduces TPS563202 system function. The bode-plot is shown in Figure 2-2 from SLVA546. From the system function and bode-plot, there is a double pole which is decided by inductance and output capacitance. There is a zero which is decided by internal ripple injection circuit. In TPS563202 this zero is constant which is 24kHz. From system function, there is also an ESR zero which is decided by ESR of output capacitance and output capacitance. Normally this zero frequency is put largely after than crossover frequency. So this zero does not have an effect on bandwidth and phase margin. Figure 2-2 does not show this zero. The DC gain is made by Acp, Vref and output voltage as Equation 2.
Figure 2-2 Bode plot