SLASF83 February   2023 MSPM0G3505 , MSPM0G3506 , MSPM0G3507

ADVANCE INFORMATION  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Functional Block Diagram
  5. 5Device and Documentation Support
    1. 5.1 Getting Started and Next Steps
    2. 5.2 Device Nomenclature
    3. 5.3 Tools and Software
    4. 5.4 Documentation Support
    5. 5.5 Support Resources
    6. 5.6 Trademarks
    7. 5.7 Electrostatic Discharge Caution
    8. 5.8 Glossary
  6. 6Mechanical, Packaging, and Orderable Information
  7. 7Revision History

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGZ|48
  • RHB|32
散热焊盘机械数据 (封装 | 引脚)
订购信息

1 Features

  • Core
    • Arm® 32-bit Cortex®-M0+ CPU with memory protection unit, frequency up to 80 MHz
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62 V to 3.6 V
  • Memories
    • Up to 128KB of flash memory with error correction code (ECC)
    • Up to 32KB of ECC protected SRAM with hardware parity
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4-Msps analog-to-digital converters (ADCs) with up to 17 external channels
      • 14-bit effective resolution at 250-ksps with hardware averaging
    • One 12-bit 1-MSPS digital-to-analog converter with integrated output buffer (DAC)
    • Two zero-drift zero-crossover chopper op-amps (OPA)
      • 0.5-µV/°C drift with chopping
      • Integrated programmable gain stage, up to 32x
    • One general-purpose amplifier (GPAMP)
    • Three high-speed comparators (COMP) with 8-bit reference DACs
      • 40-ns propagation delay in high-speed mode
      • Support low-power mode operation (1 µA)
    • Configurable 1.4-V or 2.5-V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 96 µA/MHz (CoreMark)
    • SLEEP: 200 µA at 4 MHz
    • STOP: 50 µA at 32 kHz
    • STANDBY: 1.5 µA with RTC and SRAM retention
    • SHUTDOWN: 100 nA with IO wake-up capability
  • Intelligent digital peripherals
    • 7-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Seven timers supports up to 22 PWM channels
      • One 16-bit general-purpose timer
      • One 16-bit general-purpose timer supports QEI
      • Two 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit high-resolution general-purpose timer
      • Two 16-bit advanced timers with deadband support up to 12 PWM channels
    • Two window-watchdog timers
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Four UART interfaces; one supports LIN, IrDA, DALI, Smart Card, Manchester, and three support low-power operation in STANDBY mode
    • Two I2C interfaces support up to FM+ (1 Mbit/s), SMBus/PMBus, and wakeup from STOP mode

    • Two SPIs, one SPI supports up to 32 Mbits/s

    • One Controller Area Network (CAN) interface supports CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4- to 32-MHz oscillator with up to ±1% accuracy (SYSOSC)
    • Phase-locked loop (PLL) up to 80 MHz
    • Internal 32-kHz oscillator (LFOSC)
    • External 4- to 48-MHz crystal oscillator (HFXT)
    • External 32-kHz crystal oscillator(LFXT)
    • External clock input
  • Data integrity and encryption
    • Cyclic redundancy checker (CRC-16, CRC-32)
    • True random number generator (TRNG)
    • AES encryption with 128- or 256-bit key
  • Flexible I/O features
    • Up to 60 GPIOs
      • Two 5-V tolerant IOs
      • Two high-drive IOs with 20-mA drive strength
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 64-pin LQFP
    • 48-pin LQFP, VQFN
    • 32-pin VQFN
    • 28-pin VSSOP
  • Family members
    • MSPM0G3505: 32KB flash, 16KB RAM
    • MSPM0G3506: 64KB flash, 32KB RAM
    • MSPM0G3507: 128KB flash, 32KB RAM
  • Development kits and software (also see Tools and Software)