ZHCSDF6F October   2014  – December 2021 MSP430FR4131 , MSP430FR4132 , MSP430FR4133

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 功能方框图
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Signal Descriptions
    3. 7.3 Pin Multiplexing
    4. 7.4 Connection of Unused Pins
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Active Mode Supply Current Per MHz
    6. 8.6  Low-Power Mode LPM0 Supply Currents Into VCC Excluding External Current
    7. 8.7  Low-Power Mode LPM3, LPM4 Supply Currents (Into VCC) Excluding External Current
    8. 8.8  Low-Power Mode LPMx.5 Supply Currents (Into VCC) Excluding External Current
    9. 8.9  Typical Characteristics, Low-Power Mode Supply Currents
    10. 8.10 Current Consumption Per Module
    11. 8.11 Thermal Characteristics
    12. 8.12 Timing and Switching Characteristics
      1. 8.12.1  Power Supply Sequencing
        1. 8.12.1.1 PMM, SVS and BOR
      2. 8.12.2  Reset Timing
        1. 8.12.2.1 Wake-up Times From Low-Power Modes and Reset
      3. 8.12.3  Clock Specifications
        1. 8.12.3.1 XT1 Crystal Oscillator (Low Frequency)
        2. 8.12.3.2 DCO FLL, Frequency
        3. 8.12.3.3 REFO
        4. 8.12.3.4 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
        5. 8.12.3.5 Module Oscillator Clock (MODCLK)
      4. 8.12.4  Digital I/Os
        1. 8.12.4.1 Digital Inputs
        2. 8.12.4.2 Digital Outputs
        3. 8.12.4.3 Digital I/O Typical Characteristics
      5. 8.12.5  Timer_A
        1. 8.12.5.1 Timer_A
      6. 8.12.6  eUSCI
        1. 8.12.6.1 eUSCI (UART Mode) Operating Frequency
        2. 8.12.6.2 eUSCI (UART Mode) Switching Characteristics
        3. 8.12.6.3 eUSCI (SPI Master Mode) Operating Frequency
        4. 8.12.6.4 eUSCI (SPI Master Mode) Switching Characteristics
        5. 8.12.6.5 eUSCI (SPI Slave Mode) Switching Characteristics
        6. 8.12.6.6 eUSCI (I2C Mode) Switching Characteristics
      7. 8.12.7  ADC
        1. 8.12.7.1 ADC, Power Supply and Input Range Conditions
        2. 8.12.7.2 ADC, 10-Bit Timing Parameters
        3. 8.12.7.3 ADC, 10-Bit Linearity Parameters
      8. 8.12.8  LCD Controller
        1. 8.12.8.1 LCD Recommended Operating Conditions
      9. 8.12.9  FRAM
        1. 8.12.9.1 FRAM
      10. 8.12.10 Emulation and Debug
        1. 8.12.10.1 JTAG and Spy-Bi-Wire Interface
  9. 9 Detailed Description
    1. 9.1  CPU
    2. 9.2  Operating Modes
    3. 9.3  Interrupt Vector Addresses
    4. 9.4  Bootloader (BSL)
    5. 9.5  JTAG Standard Interface
    6. 9.6  Spy-Bi-Wire Interface (SBW)
    7. 9.7  FRAM
    8. 9.8  Memory Protection
    9. 9.9  Peripherals
      1. 9.9.1  Power Management Module (PMM) and On-Chip Reference Voltages
      2. 9.9.2  Clock System (CS) and Clock Distribution
      3. 9.9.3  General-Purpose Input/Output Port (I/O)
      4. 9.9.4  Watchdog Timer (WDT)
      5. 9.9.5  System Module (SYS)
      6. 9.9.6  Cyclic Redundancy Check (CRC)
      7. 9.9.7  Enhanced Universal Serial Communication Interface (eUSCI_A0, eUSCI_B0)
      8. 9.9.8  Timers (Timer0_A3, Timer1_A3)
      9. 9.9.9  Real-Time Clock (RTC) Counter
      10. 9.9.10 10-Bit Analog Digital Converter (ADC)
      11. 9.9.11 Liquid Crystal Display (LCD)
      12. 9.9.12 Embedded Emulation Module (EEM)
      13. 9.9.13 Input/Output Schematics
        1. 9.9.13.1  Port P1 Input/Output With Schmitt Trigger
        2. 9.9.13.2  Port P2 Input/Output With Schmitt Trigger
        3. 9.9.13.3  Port P3 Input/Output With Schmitt Trigger
        4. 9.9.13.4  Port P4.0 Input/Output With Schmitt Trigger
        5. 9.9.13.5  Port P4.1 and P4.2 Input/Output With Schmitt Trigger
        6. 9.9.13.6  Port 4.3, P4.4, P4.5, P4.6, and P4.7 Input/Output With Schmitt Trigger
        7. 9.9.13.7  Port P5.0, P5.1, P5.2, and P5.3 Input/Output With Schmitt Trigger
        8. 9.9.13.8  Port P5.4, P5.5, P5.6, and P5.7 Input/Output With Schmitt Trigger
        9. 9.9.13.9  Port P6 Input/Output With Schmitt Trigger
        10. 9.9.13.10 Port P7 Input/Output With Schmitt Trigger
        11. 9.9.13.11 Port P8.0 and P8.1 Input/Output With Schmitt Trigger
        12. 9.9.13.12 Port P8.2 and P8.3 Input/Output With Schmitt Trigger
    10. 9.10 Device Descriptors (TLV)
    11. 9.11 Memory
      1. 9.11.1 Peripheral File Map
    12. 9.12 Identification
      1. 9.12.1 Revision Identification
      2. 9.12.2 Device Identification
      3. 9.12.3 JTAG Identification
  10. 10Applications, Implementation, and Layout
    1. 10.1 Device Connection and Layout Fundamentals
      1. 10.1.1 Power Supply Decoupling and Bulk Capacitors
      2. 10.1.2 External Oscillator
      3. 10.1.3 JTAG
      4. 10.1.4 Reset
      5. 10.1.5 Unused Pins
      6. 10.1.6 General Layout Recommendations
      7. 10.1.7 Do's and Don'ts
    2. 10.2 Peripheral- and Interface-Specific Design Information
      1. 10.2.1 ADC Peripheral
        1. 10.2.1.1 Partial Schematic
        2. 10.2.1.2 Design Requirements
        3. 10.2.1.3 Layout Guidelines
      2. 10.2.2 LCD_E Peripheral
        1. 10.2.2.1 Partial Schematic
        2. 10.2.2.2 Design Requirements
        3. 10.2.2.3 Detailed Design Procedure
        4. 10.2.2.4 Layout Guidelines
      3. 10.2.3 Timer
        1. 10.2.3.1 Generate Accurate PWM Using Internal Oscillator
    3. 10.3 Typical Applications
  11. 11Device and Documentation Support
    1. 11.1 Getting Started
    2. 11.2 Device Nomenclature
    3. 11.3 Tools and Software
    4. 11.4 Documentation Support
    5. 11.5 支持资源
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Export Control Notice
    9. 11.9 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

1 特性

  • 嵌入式微控制器
    • 频率高达 16MHz 的 16 位精简指令集计算机 (RISC) 架构
    • 1.8V 至 3.6V 的宽电源电压范围（最低电源电压受限于 SVS 电平，请参阅Section 8.12.1.1）
  • 经优化的低功耗模式（3V）
    • 工作模式：126µA/MHz
    • 待机模式：<1µA，实时时钟 (RTC) 计数器和液晶显示器 (LCD) 处于工作状态
    • 关断 (LPM4.5)：15nA
  • 高性能模拟
    • 10 通道 10 位模数转换器 (ADC)
      • 1.5V 的内部基准电压
      • 采样与保持 200ksps
    • 低功耗 LCD 驱动器
      • 支持高达 4×36 段或 8×32 段 LCD 配置
      • 片上电荷泵，在待机模式 (LPM3.5) 下可使 LCD 保持激活状态
      • 每个 LCD 引脚均可通过软件配置为 SEG 或 COM
      • 在 2.6V 至 3.5V 范围内提供对比度控制（阶跃为 0.06V）
  • 低功耗铁电 RAM (FRAM)
    • 容量高达 15.5KB 的非易失性存储器
    • 内置错误修正码 (ECC)
    • 可配置的写保护
    • 对程序、常量和存储的统一存储
    • 耐写次数达 1015 次
    • 抗辐射和非磁性
  • 智能数字外设
    • 红外调制逻辑
    • 两个 16 位定时器，每个定时器有 3 个捕捉/比较寄存器 (Timer_A3)
    • 一个仅用作计数器的 16 位 RTC 计数器
    • 16 位循环冗余校验器 (CRC)
  • 增强型串行通信
    • 增强型 USCI A (eUSCI_A) 支持 UART、IrDA 和 SPI
    • 增强型 USCI B (eUSCI_B) 支持 SPI 和 I2C
  • 时钟系统 (CS)
    • 片上 32kHz RC 振荡器 (REFO)
    • 带有锁频环 (FLL) 的片上 16MHz 数控振荡器 (DCO)
      • 室温下的精度为 ±1%（具有片上基准）
    • 片上超低频 10kHz 振荡器 (VLO)
    • 片上高频调制振荡器时钟 (MODCLK)
    • 外部 32kHz 晶振 (XT1)
    • 可编程 MCLK 预分频器（1 至 128）
    • 通过可编程预分频器（1、2、4 或 8）从 MCLK 获得的 SMCLK
  • 通用输入/输出和引脚功能
    • 60 个 I/O（64 引脚封装）
    • 16 个中断引脚（P1 和 P2）可以将 MCU 从 LPM 唤醒
    • 所有 I/O 均为电容式触摸 I/O
  • 开发工具和软件
  • 系列成员（另请参阅Section 6）
    • MSP430FR4133：15KB 程序 FRAM + 512B 信息 FRAM + 2KB RAM
    • MSP430FR4132：8KB 程序 FRAM + 512B 信息 FRAM + 1KB RAM
    • MSP430FR4131：4KB 程序 FRAM + 512B 信息 FRAM + 512B RAM
  • 封装选项
    • 64 引脚：LQFP (PM)
    • 56 引脚：TSSOP (G56)
    • 48 引脚：TSSOP (G48)