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  • TUSB1046-DCI USB Type-C DisplayPort 交替模式 10Gbps 线性转接驱动器交叉点开关

    • ZHCSFC8E August   2016  – January 2023 TUSB1046-DCI

      PRODUCTION DATA  

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  • TUSB1046-DCI USB Type-C DisplayPort 交替模式 10Gbps 线性转接驱动器交叉点开关
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Characteristics
    6. 6.6  DC Electrical Characteristics
    7. 6.7  AC Electrical Characteristics
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.1
      2. 7.3.2 DisplayPort
      3. 7.3.3 4-Level Inputs
      4. 7.3.4 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Configuration in GPIO Mode
      2. 7.4.2 Device Configuration In I2C Mode
      3. 7.4.3 DisplayPort Mode
      4. 7.4.4 Linear EQ Configuration
      5. 7.4.5 USB3.1 Modes
      6. 7.4.6 Operation Timing – Power Up
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 General Register (address = 0x0A) [reset = 00000001]
      2. 7.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
      3. 7.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
      4. 7.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
      5. 7.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
      6. 7.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
      7. 7.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
      8. 7.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 USB 3.1 Only
      2. 8.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 8.3.3 DisplayPort Only
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
      1.      Mechanical, Packaging, and Orderable Information
  12. 重要声明
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DATA SHEET

TUSB1046-DCI USB Type-C DisplayPort 交替模式 10Gbps 线性转接驱动器交叉点开关

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • USB Type-C 交叉点开关支持
    • USB 3.1 SSP + 2 条 DisplayPort 信道
    • 4 条 DisplayPort 信道
  • USB 3.1 Gen 1/Gen 2 高达 10Gbps
  • DisplayPort 1.4 高达 8.1Gbps (HBR3)
  • 支持 C、D、E 和 F 配置的 VESA® DisplayPort 交替模式 DFP 转接驱动交叉点开关
  • 超低功耗架构
  • 具有高达 14dB 均衡功能的线性转接驱动器
  • 透明呈现 DisplayPort 链路训练
  • 自动 LFPS 去加重控制，满足 USB 3.1 认证要求
  • 可通过 GPIO 或 I2C 进行配置
  • 支持热插拔
  • 工业温度范围：-40°C 至 85°C (TUSB1046I-DCI)
  • 商用温度范围：0°C 至 70°C (TUSB1046-DCI)
  • 4mm x 6mm、0.4mm 间距 WQFN 封装

2 应用

  • 平板电脑
  • 笔记本电脑
  • 台式机
  • 扩展坞

3 说明

TUSB1046-DCI 是一种 VESA USB Type-C™ 交替模式转接驱动开关，对于下行端口（主机），支持高达 10Gbps 的 USB 3.1 数据速率以及高达 8.1Gbps 的 DisplayPort 1.4 数据速率。这款 VESA DisplayPort Alt 模式器件支持基于 USB Type-C 标准 1.1 版本的配置 C、D、E 和 F。此线性转接驱动器与协议无关，并且还支持其他 USB Type-C Alt 模式接口。

TUSB1046-DCI 提供有多个接收线性均衡级别，用于补偿电缆或电路板走线中因码间串扰 (ISI) 而产生的损耗。该器件由 3.3V 单电源供电运行，支持商业级温度范围和工业级温度范围。

封装信息(1)
器件型号 封装 封装尺寸（NOM）
TUSB1046-DCI RNQ（WQFN，40） 4.00mm × 6.00mm
TUSB1046I-DCI
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
GUID-00B9D376-3183-4CF3-825D-F63DBB43F67A-low.gif简化版电路原理图
GUID-7360C304-94D2-4AA7-A2DB-D8C9891A0189-low.gifTUSB1046-DCI 眼图

4 Revision History

Changes from Revision D (April 2019) to Revision E (Janurary 2023)

  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 在整个数据表中添加了包容性术语Go
  • Changed DP Receiver AC coupling capacitor to 265 nF from 200 nFGo

Changes from Revision C (April 2018) to Revision D (April 2019)

  • Added following to pin 11 description: If I2C_EN = “F”, then this pin must be set to “F” or “0”. Go

Changes from Revision B (June 2017) to Revision C (April 2018)

  • Changed the appearance of the pinout image in the Pin Configuration and Function sectionGo
  • Added Note 1 to the Pin Functions tableGo
  • Changed the USB3.1 Control/Status Registers reset value From: 00000000 To: 00000100Go
  • Changed the Reset value of bit 3:2 From: 00 To: 01 in Table 7-18 Go

Changes from Revision A (April 2017) to Revision B (June 2017)

  • Changed the Human-body model (HBM) value From: ±6000 V To: ±5000 in the ESD Ratings Go

Changes from Revision * (August 2016) to Revision A (April 2017)

  • Changed title of Figure 6-2 From: USB TX EQ Settings Curves To: USB RX EQ Settings Curves Go
  • Changed title of Figure 6-3 From: USB RX EQ Settings Curves To: USB TX EQ Settings Curves Go

5 Pin Configuration and Functions

Figure 5-1 RNQ Package, 40-Pin WQFN (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
DP0p 9 Diff I DP Differential positive input for DisplayPort Lane 0.
DP0n 10 Diff I DP Differential negative input for DisplayPort Lane 0.
DP1p 12 Diff I DP Differential positive input for DisplayPort Lane 1.
DP1n 13 Diff I DP Differential negative input for DisplayPort Lane 1.
DP2p 15 Diff I DP Differential positive input for DisplayPort Lane 2.
DP2n 16 Diff I DP Differential negative input for DisplayPort Lane 2.
DP3p 18 Diff I DP Differential positive input for DisplayPort Lane 3.
DP3n 19 Diff I DP Differential negative input for DisplayPort Lane 3.
RX1n 31 Diff I/O Differential negative output for DisplayPort or differential negative input for USB3.1 Downstream Facing port.
RX1p 30 Diff I/O Differential positive output for DisplayPort or differential positive input for USB3.1 Downstream Facing port.
TX1n 34 Diff O Differential negative output for DisplayPort or USB3.1 downstream facing port.
TX1p 33 Diff O Differential positive output for DisplayPort or USB 3.1 downstream facing port.
TX2p 37 Diff O Differential positive output for DisplayPort or USB 3.1 downstream facing port.
TX2n 36 Diff O Differential negative output for DisplayPort or USB 3.1 downstream facing port.
RX2p 40 Diff I/O Differential positive output for DisplayPort or differential positive input for USB3.1 Downstream Facing port.
RX2n 39 Diff I/O Differential negative output for DisplayPort or differential negative input for USB3.1 Downstream Facing port.
SSTXp 8 Diff I Differential positive input for USB3.1 upstream facing port.
SSTXn 7 Diff I Differential negative input for USB3.1 upstream facing port.
SSRXp 5 Diff O Differential positive output for USB3.1 upstream facing port.
SSRXn 4 Diff O Differential negative output for USB3.1 upstream facing port.
EQ1 35 4 Level I This pin along with EQ0 sets the USB receiver equalizer gain for downstream facing RX1 and RX2 when USB used.
EQ0 38 4 Level I This pin along with EQ1 sets the USB receiver equalizer gain for downstream facing RX1 and RX2 when USB used.
CAD_SNK/ RSVD1(2) 29 I/O
(PD)		 When I2C_EN ! = 0, this pin is reserved. Leave open if not used. When I2C_EN = 0 , this pin is CAD_SNK (L = AUX snoop enabled and H = AUX snoop disabled with all lanes active).
HPDIN/ RSVD2(2) 32 I/O
(PD)		 When I2C_EN ! = 0, this pin is reserved. Leave open if not used. When I2C_EN = 0, this pin is an input for Hot Plug Detect received from DisplayPort sink. When HPDIN is Low for greater than 2ms, all DisplayPort lanes are disabled while the AUX to SBU switch will remain closed.
I2C_EN 17 4 Level I I2C Programming Mode or GPIO Programming Select. I2C is only disabled when this pin is ‘0".
0 = GPIO mode (I2C disabled)
R = TI Test Mode (I2C enabled at 3.3 V)
F = I2C enabled at 1.8 V
1 = I2C enabled at 3.3 V.
SBU1 27 I/O, CMOS SBU1. This pin should be DC coupled to the SBU1 pin on the Type-C receptacle. A 2-M ohm resistor to GND is also recommended.
SBU2 26 I/O, CMOS SBU2. This pin should be DC coupled to the SBU2 pin on the Type-C receptacle. A 2-M ohm resistor to GND is also recommended.
AUXp 24 I/O, CMOS AUXp. DisplayPort AUX positive I/O connected to the DisplayPort source through a AC coupling capacitor. In addition to AC coupling capacitor, this pin also requires a 100K resistor to GND. This pin along with AUXN is used by the TUSB1046-DCI for AUX snooping and is routed to SBU1/2 based on the orientation of the Type-C.
AUXn 25 I/O, CMOS AUXn. DisplayPort AUX negative I/O connected to the DisplayPort source through a AC coupling capacitor. In addition to AC coupling capacitor, this pin also requires a 100K resistor to DP_PWR (3.3V). This pin along with AUXP is used by the TUSB1046-DCI for AUX snooping and is routed to SBU1/2 based on the orientation of the Type-C.
DPEQ1 2 4 Level I DisplayPort Receiver EQ. This along with DPEQ0 will select the DisplayPort receiver equalization gain.
DPEQ0/A1 14 4 Level I DisplayPort Receiver EQ. This along with DPEQ1 will select the DisplayPort receiver equalization gain. When I2C_EN is not ‘0’, this pin will also set the TUSB1046-DCI I2C address.
SSEQ1 3 4 Level I Along with SSEQ0, sets the USB receiver equalizer gain for upstream facing SSTXP/N.
SSEQ0/A0 11 4 Level I Along with SSEQ1, sets the USB receiver equalizer gain for upstream facing SSTXP/N. When I2C_EN is not ‘0’, this pin will also set the TUSB1046-DCI I2C address. If I2C_EN = “F”, then this pin must be set to “F” or “0”.
FLIP/SCL 21 2 Level I When I2C_EN=’0’ this is Flip control pin, otherwise this pin is I2C clock. . When used for I2C clock pullup to I2C controller's VCC I2C supply.
CTL0/SDA 22 2 Level I When I2C_EN=’0’ this is a USB3.1 Switch control pin, otherwise this pin is I2C data. When used for I2C data pullup to I2C controller's VCC I2C supply.
CTL1/HPDIN 23 2 Level I
(Failsafe)
(PD)		 DP Alt mode Switch Control Pin. When I2C_EN = ‘0’, this pin will enable or disable DisplayPort functionality. Otherwise, when I2C_EN is not "0", DisplayPort functionality is enabled and disabled through I2C registers.
L = DisplayPort Disabled.
H = DisplayPort Enabled.
When I2C_EN is not "0" this pin is an input for Hot Plug Detect received from DisplayPort sink. When this HPDIN is Low for greater than 2 ms, all DisplayPort lanes are disabled and AUX to SBU switch will remain closed.
VCC 1, 6, 20, 28 P 3.3-V Power Supply
Thermal Pad G Ground
(1) I = input, O = output, G = ground
(2) Not a fail-safe I/O. Actively driving pin high while VCC is removed results in leakage voltage on VCC pins.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
Supply Voltage Range(2), VCC–0.34V
Voltage Range at any input or output pinDifferential voltage between positive and negative inputs±2.5V
Voltage at differential inputs–0.5VCC + 0.5V
CMOS Inputs–0.5VCC + 0.5V
Maximum junction temperature, TJ125°C
Storage temperature, Tstg–65150°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the GND terminals.

6.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±5000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MINNOMMAXUNIT
VCCMain power supply33.33.6V
Supply Ramp Requirement100ms
V(12C)Supply that external resistors are pulled up to on SDA and SCL1.73.6V
V(PSN)Supply Noise on VCC pins100mV
TAOperating free-air temperatureTUSB1046-DCI070°C
TUSB1046I-DCI–4085°C

6.4 Thermal Information

THERMAL METRIC(1)TUSB1046-DCIUNIT
RNQ (WQFN)
40 PINS
RθJAJunction-to-ambient thermal resistance37.6°C/W
RθJC(top)Junction-to-case (top) thermal resistance20.7°C/W
RθJBJunction-to-board thermal resistance9.5°C/W
ψJTJunction-to-top characterization parameter0.2°C/W
ψJBJunction-to-board characterization parameter9.4°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistance2.3°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Power Supply Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
PCC(ACTIVE-USB)Average active power
USB Only		Link in U0 with GEN2 data transmission. EN, EQ cntrl pins = NC, k28.5 pattern at
10 Gbps, VID = 1000 mVPP ;
CTL1 = L; CTL0 = H		335mW
PCC(ACTIVE-USB-DP1)Average active power
USB + 2 Lane DP		Link in U0 with GEN2 data transmission. EN, EQ cntrl pins = NC, k28.5 pattern at
10 Gbps, VID = 1000 mVPP;
CTL1 = H; CTL0 = H		634mW
PCC(ACTIVE--DP)Average active power
4 Lane DP Only		Four active DP lanes operating at 8.1Gbps;
CTL1 = H; CTL0 = L;		660mW
PCC(NC-USB)Average power with no connectionNo GEN1 device is connected to TXP/TXN;
CTL1 = L; CTL0 = H;		2.4mW
PCC(U2U3)Average power in U2/U3Link in U2 or U3 USB Mode Only;
CTL1 = L; CTL0 = H;		3mW
PCC(SHUTDOWN)Device ShutdownCTL1 = L; CTL0 = L; I2C_EN = 0;0.85mW

 
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