ZHCSEB3D October 2015 – May 2017 TUSB320HAI , TUSB320LAI
PRODUCTION DATA.
除非另外注明,否则 TUSB320LA 和 TUSB320HA 器件(以下简称为 TUSB320)为德州仪器 (TI) 的第三代 Type-C 配置通道逻辑和端口控制器。TUSB320 器件使用 CC 引脚来确定端口的连接状态和电缆方向,以及进行角色检测和 Type-C 电流模式控制。TUSB320 器件可配置为下行端口 (DFP)、上行端口 (UFP) 或双角色端口 (DRP),因此成为各种应用的理想选择。
根据 Type-C 规范,TUSB320 器件会交替配置为 DFP 或 UFP。CC 逻辑块通过监视 CC1 和 CC2 引脚上的上拉或下拉电阻,以确定何时连接了 USB 端口、电缆的方向以及检测到的角色。CC 逻辑根据检测到的角色来确定 Type-C 电流模式为默认、中等还是高。该逻辑通过实施 VBUS 检测来确定端口在 UFP 和 DRP 模式下是否连接成功。
该系列器件能够在宽电源范围内工作,并且具有较低功耗。TUSB320 提供两种使能版本:低电平有效使能,称为 TUSB320LA;高电平有效使能,称为 TUSB320HA。TUSB320 系列器件适用于工业级温度范围。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
TUSB320LAI | X2QFN (12) | 1.60mm x 1.60mm |
TUSB320HAI | X2QFN (12) | 1.60mm x 1.60mm |
Changes from C Revision (October 2016) to D Revision
Changes from B Revision (September 2016) to C Revision
Changes from A Revision (March 2016) to B Revision
Changes from * Revision (October 2015) to A Revision
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | TUSB320LA | TUSB320HA | ||
CC1 | 1 | 1 | I/O | Type-C configuration channel signal 1 |
CC2 | 2 | 2 | I/O | Type-C configuration channel signal 2 |
PORT(1) | 3 | 3 | I | Tri-level input pin to indicate port mode. The state of this pin is sampled when EN_N is asserted low in the TUSB320L device, EN is asserted high in the TUSB320H device, and VDD is active. This pin is also sampled following a I2C_SOFT_RESET. H - DFP (Pull-up to VDD if DFP mode is desired) NC - DRP (Leave unconnected if DRP mode is desired) L - UFP (Pull-down or tie to GND if UFP mode is desired) |
VBUS_DET(1) | 4 | 4 | I | 5-V to 28-V VBUS input voltage. VBUS detection determines UFP attachment. One 900-kΩ external resistor required between system VBUS and VBUS_DET pin. |
ADDR(1) | 5 | 5 | I | Tri-level input pin to indicate I2C address or GPIO mode: H — I2C is enabled and I2C 7-bit address is 0x67. NC — GPIO mode (I2C is disabled) L — I2C is enabled and I2C 7-bit address is 0x47. ADDR pin should be pulled up to VDD if high configuration is desired |
INT_N/OUT3(1) | 6 | 6 | O | The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain output in I2C control mode and is an active low interrupt signal for indicating changes in I2C registers. When used as OUT3, the pin is in audio accessory detect in GPIO mode: no detection (H), audio accessory connection detected (L). |
SDA/OUT1(1)(2) | 7 | 7 | I/O | The SDA/OUT1 is a dual-function pin. When I2C is enabled (ADDR pin is high or low), this pin is the I2C communication data signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the device is in UFP mode: Refer to Table 3 for more details. |
SCL/OUT2(1)(2) | 8 | 8 | I/O | The SCL/OUT2 is a dual function pin. When I2C is enabled (ADDR pin is high or low), this pin is the I2C communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the device is in UFP mode: Refer to Table 3 for more details. |
ID | 9 | 9 | O | Open drain output; asserted low when the CC pins detect device attachment when port is a source (DFP), or dual-role (DRP) acting as source (DFP). |
GND | 10 | 10 | G | Ground |
EN_N | 11 | — | I | Enable signal; active low. Pulled up to VDD internally to disable the TUSB320L device. If controlled externally, must be held low at least for 50 ms after VDD has reached its valid voltage level. |
EN | — | 11 | I | Enable signal; active high. Pulled down to GND internally to disable the TUSB320H device. If controlled externally, must be held low at least for 50 ms after VDD has reached its valid voltage level. |
VDD | 12 | 12 | P | Positive supply voltage. VDD must ramp within 25 ms or less |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±3000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VDD | Supply voltage range | 2.7 | 5 | V | |
VBUS | System VBUS voltage | 4 | 5 | 28 | V |
TA | TUSB320HAI and TUSB320LAI Operating free air temperature range | –40 | 25 | 85 | °C |
THERMAL METRIC(1) | TUSB320 | UNIT | |
---|---|---|---|
RWB (X2QFN) | |||
12 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 169.3 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 68.1 | °C/W |
RθJB | Junction-to-board thermal resistance | 83.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 2.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 83.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER CONSUMPTION | ||||||
IUNATTACHED_UFP | Current consumption in unattached mode when port is unconnected and waiting for connection. [VDD = 4.5 V, EN_N (TUSB320LA) = L, EN (TUSB320HA) = H, ADDR = NC, PORT = L] | 70 | µA | |||
IACTIVE_UFP | Current consumption in active mode. [VDD = 4.5 V, EN_N (TUSB320LA) = L, EN (TUSB320HA) = H, ADDR = NC, PORT = L] | 70 | µA | |||
ISHUTDOWN | Leakage current when VDD is supplied, but the TUSB320 device is not enabled. [VDD = 4.5 V, EN_N (TUSB320LA) = H, EN (TUSB320HA) = L] | 0.04 | µA | |||
CC1 AND CC2 PINS | ||||||
RCC_DB | Pulldown resistor when in dead-battery mode. | 4.1 | 5.1 | 6.1 | kΩ | |
RCC_D | Pulldown resistor when in UFP or DRP mode. | 4.6 | 5.1 | 5.6 | kΩ | |
VUFP_CC_USB | Voltage level range for detecting a DFP attach when configured as a UFP and DFP is advertising default current source capability. | 0.25 | 0.61 | V | ||
VUFP_CC_MED | Voltage level range for detecting a DFP attach when configured as a UFP and DFP is advertising medium (1.5-A) current source capability. | 0.7 | 1.16 | V | ||
VUFP_CC_HIGH | Voltage level range for detecting a DFP attach when configured as a UFP and DFP is advertising high (3-A) current source capability. | 1.31 | 2.04 | V | ||
VTH_DFP_CC_USB | Voltage threshold for detecting a UFP attach when configured as a DFP and advertising default current source capability. | 1.51 | 1.6 | 1.64 | V | |
VTH_DFP_CC_MED | Voltage threshold for detecting a UFP attach when configured as a DFP and advertising medium current (1.5-A) source capability. | 1.51 | 1.6 | 1.64 | V | |
VTH_DFP_CC_HIGH | Voltage threshold for detecting a UFP attach when configured as a DFP and advertising high current (3.0-A) source capability. | 2.46 | 2.6 | 2.74 | V | |
ICC_DEFAULT_P | Default mode pullup current source when operating in DFP or DRP mode. | 64 | 80 | 96 | µA | |
ICC_MED_P | Medium (1.5-A) mode pullup current source when operating in DFP or DRP mode. | 166 | 180 | 194 | µA | |
ICC_HIGH_P | High (3-A) mode pullup current source when operating in DFP or DRP mode.(1) | 304 | 330 | 356 | µA | |
CONTROL PINS: PORT, ADDR, INT/OUT3, EN_N, EN, ID | ||||||
VIL | Low-level control signal input voltage (PORT, ADDR, EN_N, EN) | 0.4 | V | |||
VIM | Mid-level control signal input voltage (PORT, ADDR) | 0.28 × VDD | 0.56 × VDD | V | ||
VIH | High-level control signal input voltage (PORT, ADDR, EN_N) | VDD – 0.3 | VDD | V | ||
VIH_EN | High-Level control signal input voltage for EN for TUSB320HA | 1.05 | 3.65 | V | ||
IIH | High-level input current | –20 | 20 | µA | ||
IIL | Low-level input current | –10 | 10 | µA | ||
IID_LEAKAGE | Current Leakage on ID pin | VDD = 0 V; ID = 5 V | 10 | µA | ||
REN_N | Internal pullup resistance for EN_N for TUSB320LA | 1.1 | MΩ | |||
REN | Internal pulldown resistance for EN for TUSB320HA | 500 | kΩ | |||
Rpu(2) | Internal pullup resistance (PORT, ADDR) | 588 | kΩ | |||
Rpd (2) | Internal pulldown resistance (PORT, ADDR) | 1.1 | MΩ | |||
VOL | Low-level signal output voltage (open-drain) (INT_N/OUT3, ID) | IOL = –1.6 mA | 0.4 | V | ||
Rp_ODext | External pullup resistor on open drain IOs (INT_N/OUT3, ID) | 200 | kΩ | |||
Rp_TLext | Tri-level input external pullup resistor (PORT, ADDR) | 4.7 | kΩ | |||
I2C - SDA/OUT1, SCL/OUT2 CAN OPERATE FROM 1.8 V OR 3.3 V (±10%)(3) | ||||||
VDD_I2C | Supply range for I2C (SDA/OUT1, SCL/OUT2) | 1.65 | 1.8 | 3.6 | V | |
VIH | High-level signal voltage | 1.05 | 3.6 | V | ||
VIL | Low-level signal voltage | 0.4 | V | |||
VOL | Low-level signal output voltage (open drain) | IOL = –1.6 mA | 0.4 | V | ||
VBUS_DET IO PINS (CONNECTED TO SYSTEM VBUS SIGNAL) | ||||||
VBUS_THR | VBUS threshold range | See Figure 1 | 2.95 | 3.3 | 3.8 | V |
RVBUS | External resistor between VBUS and VBUS_DET pin | 855 | 887 | 920 | KΩ | |
RVBUS_PD | Internal pulldown resistance for VBUS_DET | 95 | KΩ |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
I2C (SDA, SCL) | |||||
tSU:DAT | Data setup time | 100 | ns | ||
tHD;DAT | Data hold time | 10 | ns | ||
tSU:STA | Set-up time, SCL to start condition | 0.6 | µs | ||
tHD:STA | Hold time (repeated), start condition to SCL | 0.6 | µs | ||
tSU:STO | Set up time for stop condition | 0.6 | µs | ||
tBUF | Bus free time between a stop and start condition | 1.3 | µs | ||
tVD;DAT | Data valid time | 0.9 | µs | ||
tVD;ACK | Data valid acknowledge time | 0.9 | µs | ||
fSCL | SCL clock frequency; I2C mode for local I2C control | 400 | kHz | ||
tr | Rise time of both SDA and SCL signals | 300 | ns | ||
tf | Fall time of both SDA and SCL signals | 300 | ns | ||
CBUS_100KHZ | Total capacitive load for each bus line when operating at ≤ 100 kHz | 400 | pF | ||
CBUS_400KHz | Total capacitive load for each bus line when operating at 400 kHz | 100 | pF |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
tCCCB_DEFAULT | Power on default of CC1 and CC2 voltage debounce time | DEBOUCE register = 2'b00 |
168 | ms | ||
tVBUS_DB | Debounce of VBUS_DET pin after valid VBUS_THR | 2 | ms | |||
tDRP_DUTY_CYCLE | Power-on default of percentage of time DRP advertises DFP during a tDRP | DRP_DUTY_CYCLE register = 2'b00 |
30% | |||
tDRP | The period during which the TUSB320HA or the TUSB320LA in DFP mode completes a DFP to UFP and back advertisement. | 50 | 75 | 100 | ms | |
tI2C_EN | Time from TUSB320LA EN_N low or TUSB320HA EN high and VDD active to I2C access available | 100 | ms | |||
tSOFT_RESET | Soft reset duration | 26 | 49 | 95 | ms |