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Table 1-1 lists all advisories, modules affected, and the applicable silicon revisions.
| MODULE | DESCRIPTION | SILICON REVISIONS AFFECTED | |||
|---|---|---|---|---|---|
| B | |||||
| Power | Advisory Power_03 — Increased voltage ripple at low supply voltages when DC/DC converter is enabled | Yes | |||
| PKA | Advisory PKA_01 — Public key accelerator (PKA) interrupt line is always high when module is enabled and PKA is idle | Yes | |||
| PKA | Advisory PKA_02 — Public key accelerator (PKA) RAM is not byte accessible | Yes | |||
| I2C | Advisory I2C_01 — I2C module master status bit is set late | Yes | |||
| I2S | Advisory I2S_01 — I2S bus faults are not reported | Yes | |||
| CPU | Advisory CPU_01 — Arm® Errata #838869: Store immediate overlapping exception return operation might vector to incorrect interrupt | Yes | |||
| CPU | Advisory CPU_02 — Arm® Errata #752770: Interrupted loads to SP can cause erroneous behavior | Yes | |||
| CPU | Advisory CPU_03 — Arm® Errata #776924 VDIV or VSQRT instructions might not complete correctly when very short ISRs are used | Yes | |||
| CPU, System | Advisory CPU_Sys_01 — The SysTick calibration value (register field CPU_SCS.STCR.TENMS) used to set up 10-ms periodic ticks is incorrect when the system CPU is running off divided down 48-MHz clock | Yes | |||
| System | Advisory Sys_01 — Device might boot into ROM serial bootloader when waking up from shutdown | Yes | |||
| System | Advisory Sys_05 — Elevated power-on-reset (POR) threshold voltage at low temperatures | Yes | |||
| System Controller | Advisory SYSCTRL_01 — Resets occurring in a specific 2-MHz period during initial power up are incorrectly reported | Yes | |||
| SRAM | Advisory SRAM_01 — Reserved addresses within SRAM_MMR region alias into SRAM array | Yes | |||
| General-Purpose Timer | Advisory GPTM_01 — An incorrect value might be written to the general-purpose (GP) timers MMRs (memory mapped registers) when simultaneously accessing the PKA (public key accelerator) engine and/or the AES (advanced encryption standard) engine from a different master | Yes | |||
| ADC | Advisory ADC_01 — Periodic ADC trigger at 200 kHz rate can be ignored when XOSC_HF is turned on or off | Yes | |||
| ADC | Advisory ADC_02 — ADC samples can be delayed by 2 or 14 clock cycles (24 MHz) when XOSC_HF is turned on or off, resulting in sample jitter | Yes | |||
| ADC | Advisory ADC_03 — Software can hang when reading the ADC FIFO if a single manual ADC trigger is generated immediately after the ADC is enabled | Yes | |||
To designate the stages in the product development cycle, Texas Instruments™ assigns prefixes to the part numbers of all devices and support tools. Each device has one of three prefixes: X, P, or null (for example, XCC2652R7). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (X/TMDX) through fully qualified production devices/tools (null/TMDS).
Device development evolutionary flow:
Support tool development evolutionary flow:
X and P devices and TMDX development-support tools are shipped against the following disclaimer:
"Developmental product is intended for internal evaluation purposes."
Production devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
This document supports the following device:
Figure 2-1 and Table 2-1 describe package symbolization and the device revision code.
| Device Revision Code | Silicon Revision |
|---|---|
| B | PG1.1 |
