This document describes the known exceptions to functional specifications (advisories) to the CC2642RSimpleLink™ device.
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Table 1-1 lists all advisories, modules affected, and the applicable silicon revisions.
MODULE | DESCRIPTION | SILICON REVISIONS AFFECTED | |||
---|---|---|---|---|---|
E/F | |||||
Radio | Advisory Radio_03 — LE 2M PHY Sensitivity vs Selectivity | Yes | |||
Power | Advisory Power_03 — Increased voltage ripple at low supply voltages when DC/DC converter is enabled | Yes | |||
PKA | Advisory PKA_01 — Public key accelerator (PKA) interrupt line is always high when module is enabled and PKA is idle | Yes | |||
PKA | Advisory PKA_02 — Public key accelerator (PKA) RAM is not byte accessible | Yes | |||
I2C | Advisory I2C_01 — I2C module master status bit is set late | Yes | |||
I2S | Advisory I2S_01 — I2S bus faults are not reported | Yes | |||
CPU | Advisory CPU_01 — Arm® Errata #838869: Store immediate overlapping exception return operation might vector to incorrect interrupt | Yes | |||
CPU | Advisory CPU_02 — Arm® Errata #752770: Interrupted loads to SP can cause erroneous behavior | Yes | |||
CPU | Advisory CPU_03 — Arm® Errata #776924 VDIV or VSQRT instructions might not complete correctly when very short ISRs are used | Yes | |||
CPU, System | Advisory CPU_Sys_01 — The SysTick calibration value (register field CPU_SCS.STCR.TENMS) used to set up 10-ms periodic ticks is incorrect when the system CPU is running off divided down 48-MHz clock | Yes | |||
System | Advisory Sys_01 — Device might boot into ROM serial bootloader when waking up from shutdown | Yes | |||
System | Advisory Sys_05 — Elevated power-on-reset (POR) threshold voltage at low operating temperatures. | Yes | |||
System Controller | Advisory SYSCTRL_01 — Resets occurring in a specific 2-MHz period during initial power up are incorrectly reported | Yes | |||
SRAM | Advisory SRAM_01 — Reserved addresses within SRAM_MMR region alias into SRAM array | Yes | |||
General-Purpose Timer | Advisory GPTM_01 — An incorrect value might be written to the general-purpose (GP) timers MMRs (memory mapped registers) when simultaneously accessing the PKA (public key accelerator) engine and/or the AES (advanced encryption standard) engine from a different master | Yes | |||
ADC | Advisory ADC_01 — Periodic ADC trigger at 200 kHz rate can be ignored when XOSC_HF is turned on or off | Yes | |||
ADC | Advisory ADC_02 — ADC samples can be delayed by 2 or 14 clock cycles (24 MHz) when XOSC_HF is turned on or off, resulting in sample jitter | Yes | |||
ADC | Advisory ADC_03 — Software can hang when reading the ADC FIFO if a single manual ADC trigger is generated immediately after the ADC is enabled | Yes | |||
ADC | Advisory ADC_04 — Misbehaving ADC FIFO status flags in the AUX_ANAIF:ADCFIFOSTAT register (OVERFLOW, FULL, ALMOST_FULL, and EMPTY) | Yes | |||
ADC | Advisory ADC_05 — Writing any value to AUX_ANAIF:ADCTRIG.START will create an ADC trigger | Yes |
To designate the stages in the product development cycle, Texas Instruments™ assigns prefixes to the part numbers of all devices and support tools. Each device has one of three prefixes: X, P, or null (for example, XCC2642R). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (X/TMDX) through fully qualified production devices/tools (null/TMDS).
Device development evolutionary flow:
Support tool development evolutionary flow:
X and P devices and TMDX development-support tools are shipped against the following disclaimer:
"Developmental product is intended for internal evaluation purposes."
Production devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
This document supports the following device:
Figure 2-1 and Table 2-1 describe package symbolization and the device revision code.
DEVICE REVISION CODE | SILICON REVISION |
---|---|
E | PG2.1 (see following NOTE) |
F | PG3.0 (see following NOTE) |
LE 2M PHY Sensitivity vs Selectivity
Revision: F and earlier
Some devices operating using the Bluetooth Low Energy 2 Mbps (LE 2M) data rate may experience increased Packet Error Rate (PER) for receiver RSSI input levels centered around -70 dBm with a narrow window of +/- 5dB.
Updated radio settings are provided starting with the SimpleLink CC13xx_26xx SDK v5.40.00 and are applied by default. These settings improve sensitivity while resulting in up to 4 dB degradation in selectivity.
To minimize potential PER impact, it is recommended to leverage the updated radio settings made default in the SimpleLink CC13xx_26xx SDK v5.40.00 and later SDKs. If the LE 2M PHY is not used, it is not required to use these settings and SDK migration is not required. For applications configured to use the LE 2M PHY, migration to the latest SDK to leverage these settings is recommended.
Increased voltage ripple at low supply voltages when DC/DC converter is enabled
Revision F and earlier
At supply voltages <2.0V, a hardware control module disables the DC/DC converter to maximize system efficiency. This module does not have enough hysteresis, causing approx 10 mV of ripple on the VDDR regulated power supply. Based on internal testing of the device, it is not anticipated that this erratum affects RF performance. However, these test results cannot ensure that a customer’s application or end equipment will not be affected.
Use the TI-provided Power driver (PowerCC26X2.c) which automatically disables the DC/DC converter when supply voltage is <2.2V.
The workaround is available in all SDK versions.
Public key accelerator (PKA) interrupt line is always high when module is enabled and PKA is idle
Revision F and earlier
When the PKA module is enabled and idle, the interrupt line is always high and the interrupt can thus not be used as is.
The workaround is to disable the PKA interrupt in the interrupt service routine while the PKA module is idle and re-enable the interrupt right after starting an operation.
The workaround is implemented in the TI-provided cryptography drivers (ECDHCC26X2.c, ECDSACC26X2.c, ECJPAKECC26X2.c_list.c) in the following SimpleLink software development kit (SDK) versions: