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  • CC3100 and CC3200 SimpleLink™ Wi-Fi® Embedded Programming

    • SWRU577 July   2021 CC3100 , CC3200

       

  • CONTENTS
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  • CC3100 and CC3200 SimpleLink™ Wi-Fi® Embedded Programming
  1.   Trademarks
  2. 1Introduction
  3. 2Embedded Programming Schemes
  4. 3Setup
  5. 4Bootloader Protocol
    1. 4.1 Overview
    2. 4.2 General Message Format
    3. 4.3 Commands
      1. 4.3.1 Get Status
      2. 4.3.2 Get Storage List
      3. 4.3.3 Raw Storage Write
      4. 4.3.4 Get Version Info
      5. 4.3.5 Raw Storage Erase
      6. 4.3.6 Get Storage Info
      7. 4.3.7 Execute From RAM
      8. 4.3.8 Switch UART to APPS MCU
      9. 4.3.9 FS Programming
    4. 4.4 Responses
      1. 4.4.1 Ack
      2. 4.4.2 Nack
      3. 4.4.3 Last Status
      4. 4.4.4 Storage List
      5. 4.4.5 Storage Info
      6. 4.4.6 Version Info
  6. 5Embedded Programming Procedure
    1. 5.1 Overview
    2. 5.2 High-Level Flow Diagram
    3. 5.3 Image Programming in Detail
      1. 5.3.1 Step 1: Target Connection
      2. 5.3.2 Step 2: Target Detection
      3. 5.3.3 Step 3: MUX UART to the Network Processor
      4. 5.3.4 Step 4: Get SRAM Storage Info
      5. 5.3.5 Step 9: Raw Storage Erase – SFLASH
      6. 5.3.6 Step 10: Raw Storage Write – SFLASH
      7. 5.3.7 Step 11: FS Programming
      8. 5.3.8 Step 12: Device Reset
  7. IMPORTANT NOTICE
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USER'S GUIDE

CC3100 and CC3200 SimpleLink™ Wi-Fi® Embedded Programming

Trademarks

SimpleLink is a trademark of Texas Instruments Incorporated.

Wi-Fi is a registered trademark of Wi-Fi Alliance.

Stellaris is a registered trademark of Texas Instruments Incorporated.

Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

All trademarks are the property of their respective owners.

1 Introduction

The SimpleLink™ CC3100 and CC3200 devices are Wi-Fi® and networking devices that provide a comprehensive networking solution for low-cost and low-power microcontrollers (MCU) using a thin driver and simple API set.

Each product with an embedded CC3100 or CC3200 device onboard must also have a serial flash device connected. The serial flash must be formatted, and at a minimum programmed with the Service Pack, which contains necessary software updates and additional features. For the CC3200, a binary image running on the internal MCU processor must also be programmed.

There are several options for serial flash programming, as follows:

  • UniFlash – a PC-based utility offering image creation and programming. Content is programmed using the UART.
  • Industrial flash programmer – flashes a complete image prepared with UniFlash directly to the serial flash. Can be applied when no SimpleLink device is attached to the serial flash. Content is programmed using the serial flash SPI lines.
  • Over-the-air programming – the serial flash must be formatted in advance. Content is delivered through a network connection.

This application note describes in details additional options that leverage all the features UniFlash has to offer, but without the necessary connected PC. This option is referred to as Embedded Programming. To achieve embedded programming, bootloader protocol implemented over UART is described in detail.

The following sections describe the setup, bootloader protocol, and procedure of the embedded programming feature.

2 Embedded Programming Schemes

Several schemes can leverage full image programming over the UART, as follows.

  • Embedded programming in production line – there are setups on the production line that do not include the PC. Instead, programmable devices such as the MCU, DSP, or FPGA are used.
  • Main external processor (other than the CC3200 MCU) – in many cases, CC3100 and CC3200 devices are just another component in the device enabling network communication. Such devices have main processors that usually control and schedule everything in the system. These cores must have the ability to upgrade and program CC3100 or CC3200 peripherals.

3 Setup

The UART interface must be connected between the CC3100 or CC3200 device and the main processor. Only two pins are required, UART TX and UART RX. Flow control is not required.

The common configuration that applies to all chipsets follows:

  • Baud rate of 921600 bps
  • 8 bits
  • No parity
  • 1 stop bit

In addition, the nHib/nReset pin is required and it must be have the ability to be temporarily pulled to GND during a reset to make the device go into bootloader mode.

For the CC3200 device, an additional SOP1 pin must be pulled up during the device reset to make the device go into bootloader mode.

GUID-89CF8889-A09A-48A2-99B0-1E5EDF18979C-low.gif Figure 3-1 CC3200 and CC3200 QFN Programming Setup

4 Bootloader Protocol

4.1 Overview

The CC3100 and CC3200 bootloader protocol is a simple command-response protocol. The protocol is based on the protocol used by the Stellaris® LM Flash Programmer. The commands are serially executed and there are no unsolicited events during the bootloader phase.

4.2 General Message Format

Table 4-1 provides the general message format.

Table 4-1 General Message Format
Length (Big Endian) Checksum Opcode Data [optional]
2 bytes 1 byte 1 byte n bytes

The length includes all fields except the checksum (including the Length field itself), so in general:

Equation 1. Length = Length(Length) + Length(Opcode) + Length(Data) = 3 + Length(Data)

 

Checksum is a simple hexadecimal addition of the Opcode and Data fields. Checksum is then clipped to occupy the least significant byte only.

Table 4-2 lists all the commands and responses of the bootloader protocol.

Table 4-2 Bootloader Commands and Responses
Item Command or Response Link
Get Storage List Command Section 4.3.2
Raw Storage Write Command Section 4.3.3
Get Version Information Command Section 4.3.4
Raw Storage Erase Command Section 4.3.5
Switch UART to APPS MCU Command Section 4.3.8
Ack Response Section 4.4.1
Version Info Response Section 4.4.6

4.3 Commands

4.3.1 Get Status

Table 4-3 lists the Get Status command.

Table 4-3 Get Status
Description
BriefThis command returns the status of the last command executed.
Typically, this command must be invoked after every command sent to ensure that the previous command was successful or, if unsuccessful, to properly respond upon failure.
The bootloader responds by sending a 1-byte packet containing the current status code.
Opcode0x23
DirectionHost to target
ResponseAck + Last Status response
Format[USHORT] Length (exclude checksum)
[BYTE] Checksum (exclude length)
[BYTE] Opcode
CommentsHost responds back with Ack (Ack + Last Status response).

4.3.2 Get Storage List

Table 4-4 lists the Get Storage List command.

Table 4-4 Get Storage List
Description
BriefThis command is used to fetch the list of existing storages.
Opcode0x27
DirectionHost to target
ResponseAck + Storage List response
Format[USHORT] Length (exclude checksum)
[BYTE] Checksum (exclude length)
[BYTE] Opcode
Comments—

4.3.3 Raw Storage Write

Table 4-5 lists the Raw Storage Write command.

Table 4-5 Raw Storage Write
Description
BriefThis command triggers sending a chunk of raw storage data specified by StorageID, starting from a position specified by Offset and with a size specified by Length.
Opcode0x2D
DirectionHost to target
ResponseAck
Format[USHORT] Length (exclude checksum)
[BYTE] Checksum (exclude length)
[BYTE] Opcode
[UINT32] StorageID
[UINT32] Offset (starting offset relative to the start of storage, in bytes)
[UINT32] Length (amount of bytes to write)
[BYTE Stream] Data
CommentsThe chunk is 4096 bytes and the Length must be smaller than (chunk_size-16).
The SRAM storage ID is 0x0.
The serial flash storage ID is 0x2.

4.3.4 Get Version Info

Table 4-6 lists the Get Version Info command.

Table 4-6 Get Version Info
Description
Brief This command is used to fetch version information of all cores and chip types.
Opcode 0x2F
Direction Host to target
Response Ack + Version info response
Format [USHORT] Length (exclude checksum)
[BYTE] Checksum (exclude length)
[BYTE] Opcode
Comments —

4.3.5 Raw Storage Erase

Table 4-7 lists the Raw Storage Erase command.

Table 4-7 Raw Storage Erase
Description
BriefThis command erases the specified blocks (making them writable) from storage specified by StorageID. NumOfBlocks specifies the amount of blocks to erase and Offset specifies the offset of the first blocks from the start of the device.
Opcode0x30
DirectionHost to target
ResponseAck
Format[USHORT] Length (exclude checksum)
[BYTE] Checksum (exclude length)
[BYTE] Opcode
[UINT32] StorageID
[UINT32] Offset (in blocks, relative to start of device)
[UINT32] NumOfBlocks (number of blocks to erase)
CommentsThe SRAM storage ID is 0x0.
The serial flash storage ID is 0x2.

 

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