LP886x-Q1 Feedback Resistor Design Considerations

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1 Introduction

Unlike the conventional constant voltage boost controller that uses feedback resistor network to set one regulated voltage, the feedback network of LP886x-Q1 is used to determine the minimum and maximum voltages at boost output. In the actual application, the boost output voltage is adjusted dynamically by an internal 11-bit current DAC to the minimum necessary level needed by the output channels to achieve optimum efficiency. Boost UVP and OVP levels are also defined by the feedback network and appropriate feedback resistor values need to be chosen to prevent false triggering of UVP and OVP faults.

2 Boost Output Voltage Range Design Consideration

Feedback resistors are selected to ensure that the minimum boost voltage with I_SEL = 0 μA is below the minimum LED string voltage, as shown in Equation 4. The maximum boost voltage with I_SEL = 38.7 μA need to be at least 2 V greater than the maximum LED string voltage + the maximum headroom at LED sink pins as shown in Equation 2.

Equation 1.

Equation 2.

Where:

- V_MINBOOST is the minimum boost voltage when I_SEL = 0 μA (minimum)
- V_MAXBOOST is the maximum boost voltage when I_SEL = 38.7 μA (maximum)
- V_STRING is the voltage across LED string
- V_HEADROOM is the headroom voltage of LED current sink and can be substituted with 1 V in Equation 2
- 2 V in Equation 2 is an empirical design margin considering the variations of internal reference and the tolerance of feedback resistors.

3 Boost UVP Design Consideration

When V_{BOOST_UVP} is reached, in other words, when V_FB is below V_UVP of 0.886 V, it is a sign that the boost is no longer in regulation. During normal operation, V_FB is regulated at V_BG of 1.21 V. If undervoltage condition lasts longer than 110 ms, LP8863-Q1 (using LP8863-Q1 as an example and it is similar for LP886x-Q1) will report boost overcurrent, by generating fault interrupt and asserting BSTOCP_STATUS bit in INTERRUPT_STATUS_1 register, as shown in Table 3-1. The device will go to standby for 200 ms before restart attempt. If V_{BOOST_UVP,MAX} (when I_SEL is at maximum value) level is lower than (V_STRING + V_HEADROOM,MAX), open LED fault may be reported unintentionally instead of overcurrent fault during an overcurrent event. Therefore, we recommend to design the maximum boost UVP threshold V_{BOOST_UVP,MAX} when the current DAC I_SEL is at maximum value, higher than V_STRING,MAX + V_HEADROOM,MAX, as shown in Equation 4. The aim is to prevent false triggering of LED open fault during an overcurrent event when boost under voltage is detected.

Equation 3.

Table 3-1 Boost OCP, OVP and Open LED Fault Table

FAULT NAME	CONDITION	ACTION
Boost overcurrent	FB pin voltages falls below VUVP level for > 110 ms.	Device goes to standby and then attempts to restart 200 ms after fault occurs.
Open LED string	Headroom voltage on one or more channels is below minimum level and boost has adapted to maximum level.	Faulted LED string is disabled and removed from adaptive boost control loop. String is re-enabled next power cycle.
Boost OVP low	FB pin voltage rises above VFB_OVPL level.	Boost stops switching until boost voltage level falls. The device remains in normal mode with LED drivers operational.
Boost OVP high	FB pin voltage rises above VFB_OVPH level or DISCHARGE pin voltage rises above VBST_OVPH.	Device goes to Fault Recovery and waits until output voltage falls below threshold before restarting.

4 Boost OVP Design Consideration

When the voltage of DISCHARGE pin is higher than V_{BOOST_OVPH} (typically 50 V, minimum 48.5 V for LP8866-Q1), boost OVP high fault will be reported and device will go to fault recovery until boost voltage falls below threshold before restarting, as shown in Table 3-1. Be careful when designing boost OVP low threshold of initial voltage considering the overshoot during start-up. The boost OVP low threshold of initial voltage should be designed to be triggered first before DISCHARGE pin reaching V_{BOOST_OVPH}. Otherwise, boost OVP high fault will be reported if DISCHARGE pin reaches 48.5 V during start-up. Then the device will go to fault recovery mode and restart again and again. Therefore, we recommend to design V_{BOOST_OVP_LOW_INITIAL} < 48 V, as shown in Equation 4.

Equation 4.

Where:

V_{BOOST_OVP_LOW_INITIAL} is the boost OVP Llow threshold for initial voltage during start up
48 V is 0.5 V (additional margin) below the minimum V_{BOOST_OVPH}.

5 Calculation of Feedback Resistor Values

The resistive divider (R_FB1, R_FB2, R_FB3) defines both the minimum and maximum adaptive boost voltage levels, as well as UVP and OVP levels. For feedback network using two-resistor method as shown in Figure 5-1, V_MINBOOST, V_MAXBOOST, V_{BOOST_UVP,MAX}, V_{BOOST_OVP_LOW} and V_STRING can be expressed in Equation 5, Equation 6, Equation 7, Equation 8, and Equation 9:

Equation 5.

Equation 6.

Equation 7.

Equation 8.

Equation 9.

where:

V_BG is the band-gap voltage = 1.21 V
R_FB1 is the upper feedback resistor
R_FB2 is the lower feedback resistor
I_{SEL_MAX} is the maximum internal 11-bit DAC current I_SEL = 38.7 μA
V_UVP is the undervoltage threshold at feedback pin = 0.886 V
V_OVPL is the overvoltage low level at feedback pin = 1.423 V
0.886 is the ratio of initial I_SEL DAC current with respect to I_{SEL_MAX} to set initial boot voltage during start-up
V_LED is the voltage cross an LED
n is the number of LEDs in a string

Figure 5-1 Two-Resistor Feedback Network

For feedback network using three-resistor method as shown in Figure 5-2, V_MINBOOST, V_MAXBOOST, V_{BOOST_UVP,MAX} and V_{BOOST_OVP_LOW} can be expressed in Equation 10, Equation 11, Equation 12, and Equation 13:

Equation 10.

Equation 11.

Equation 12.

Equation 13.

where:

R_FB3 is the third feedback resistor can be used in applications where less than 200-kΩ resistors are required.

Figure 5-2 Three-Resistor Feedback Network