SLVAF93 October   2022 LP8764-Q1 , TPS6594-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Hardware and PMIC Setup
  5. 3Configuration Overview
  6. 4Instructions
  7. 5Special Considerations
    1. 5.1 Changing the Serial Control Interface
    2. 5.2 Updating the Frequency Selection
    3. 5.3 PFSM
    4. 5.4 Permanently Locking the NVM
    5. 5.5 Updating the Register CRC
  8. 6NVM Validation
  9. 7References
  10.   A Registers Backed by NVM
  11.   B Non-NVM Registers Which are Part of the Register CRC
  12.   C CRC for User Registers, Page 0 and Page 4
  13.   D Example With I2C Serial Interface

Abstract

The TPS6594-Q1, TPS6593-Q1, and LP8764-Q1 family of power management integrated circuits (PMICs) include a configurable non-volatile memory (NVM) space. The Scalable PMIC GUI provides the ability to generate a binary image either from an NVM configuration (assembly file) generated from the GUI or generated manually. This document details the hardware setup and steps for uploading the binary image to the NVM of the PMIC.