This manual discusses the BQ40Z50-R5 device's modules and peripherals, and how each is used to build a complete battery pack gas gauge and protection solution. See the BQ40Z50-R2 1-Series to 4-Series Li-Ion Battery Pack Manager data sheet (SLUSCS4) for BQ40Z50-R5 electrical specifications, and the BQ40Z50-R4 to BQ40Z50-R5 Change List to see the new BQ40Z50-R5 features and performance improvements.
The following notation is used if SBS commands and data flash values are mentioned within a text block:
The reference format for SBS commands is: SBS:Command Name(Command No.): Manufacturer Access(MA No.)[Flag]; for example:
SBS:Voltage(0x09) or SBS:ManufacturerAccess(0x00): Seal Device(0x0020)
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Impedance Track® is a registered trademark of Texas Instruments.
All trademarks are the property of their respective owners.
The BQ40Z50-R5 device provides a feature-rich battery management solution for 1-series cell to 4-series cell battery-pack applications. The BQ40Z50-R5 device has extended capabilities, including:
The BQ40Z50-R5 provides recoverable protection. When the protection is triggered, charging and/or discharging is disabled. This is indicated by the OperationStatus()[XCHG] = 1 when charging is disabled, and/or the OperationStatus()[XDSG] = 1 when discharging is disabled. Once the protection is recovered, charging and discharging resume. All protection items can be enabled or disabled under Settings:Enabled Protections A, Settings:Enabled Protections B, Settings:Enabled Protections C, and Settings:Enabled Protections D.
When the protections and permanent fails are triggered, the BatteryStatus()[TCA][TDA][FD][OCA][OTA] is set according to the type of safety protections. Section 4.8 provides a summary of the various alarms flags' set conditions.
Delay settings with 1-s granularity can have an average trigger delay equal to the delay setting plus 1.5 s.
The BQ40Z50-R5 device can detect cell undervoltage in batteries and protect cells from damage by preventing further discharge.
| Status | Condition | Action | ||
|---|---|---|---|---|
| Normal | Min cell voltage1..4 > CUV:Threshold | SafetyAlert()[CUV] = 0 BatteryStatus()[TDA] = 0 | ||
| Alert | Min cell voltage1..4 ≤ CUV:Threshold | SafetyAlert()[CUV] = 1 BatteryStatus()[TDA] = 1 | ||
| Trip | Min cell voltage1..4 ≤ CUV:Threshold for CUV:Delay duration | SafetyAlert()[CUV] = 0 SafetyStatus()[CUV] = 1 BatteryStatus()[FD] = 1, [TDA] = 0 OperationStatus()[XDSG] = 1 | ||
| Recovery | Condition 1: SafetyStatus()[CUV] = 1 AND Min cell voltage1..4 ≥ CUV:Recovery AND Protection Configuration[CUV_RECOV_CHG] = 0 | SafetyStatus()[CUV] = 0 BatteryStatus()[FD] = 0, [TDA] = 0 OperationStatus()[XDSG] = 0 | ||
| OR Condition 2: SafetyStatus()[CUV] = 1 AND Min cell voltage1..4 ≥ CUV:Recovery AND Protection Configuration[CUV_RECOV_CHG] = 1 AND PACK voltage > Charger Present Threshold , | ||||
The BQ40Z50-R5 device can detect cell undervoltage in batteries and protect cells from damage by preventing further discharge. The protection is compensated by the Current() × cell resistance1..4.
| Status | Condition | Action |
|---|---|---|
| Normal | Min cell voltage1..4 – Current() × cell resistance > CUVC: Threshold | SafetyAlert()[CUVC] = 0 BatteryStatus()[TDA] = 0 |
| Alert | Min cell voltage1..4 – Current() × cell resistance ≤ CUVC: Threshold | SafetyAlert()[CUVC] = 1 BatteryStatus()[TDA] = 1 |
| Trip | Min cell voltage1..4 – Current() × cell resistance ≤ CUVC: Threshold for CUVC:Delay duration | SafetyAlert()[CUVC] = 0 SafetyStatus()[CUVC] = 1 BatteryStatus()[FD] = 1, [TDA] = 0 OperationStatus()[XDSG] = 1 |
| Recovery | Condition 1: SafetyAlert()[CUVC] = 1 AND Min cell voltage1..4 – Current() × cell resistance > CUVC: Recovery AND Protection Configuration[CUV_RECOV_CHG] = 0 | SafetyStatus()[CUVC] = 0 BatteryStatus()[FD] = 0, [TDA] = 0 OperationStatus()[XDSG] = 0 |
| OR Condition 2: SafetyAlert()[CUVC] = 1 AND Min cell voltage1..4 – Current() × cell resistance > CUVC: Recovery AND Protection Configuration[CUV_RECOV_CHG] = 1 AND PACK voltage > Charger Present Threshold |
The BQ40Z50-R5 device can detect cell overvoltage in batteries and protect cells from damage by preventing further charging.
The protection detection threshold may be influenced by the temperature settings of the advanced charging algorithm and the measured temperature. Additionally, this protection feature can be enabled to create a PF by setting the [COVL] bit in the Enabled PF A register.
| Status | Condition | Action |
|---|---|---|
| Normal, ChargingStatus()[UT] or [LT] = 1 | Max cell voltage1..4 < COV:Threshold Low Temp | SafetyAlert()[COV] = 0 PFAlert()[COVL] = 0 Decrement COVL counter by one after each COV:Counter Dec Delay period if COVL counter > 0 |
| Normal, ChargingStatus()[STL] = 1 | Max cell voltage1..4 < COV:Threshold Standard Temp Low | |
| Normal, ChargingStatus()[STH] = 1 | Max cell voltage1..4 < COV:Threshold Standard Temp High | |
| Normal, ChargingStatus()[RT] = 1 | Max cell voltage1..4 < COV:Threshold Rec Temp | |
| Normal, ChargingStatus()[HT] or [OT] = 1 | Max cell voltage1..4 < COV:Threshold High Temp | |
| Alert, ChargingStatus()[UT] or [LT] = 1 | Max cell voltage1..4 ≥ COV:Threshold Low Temp | SafetyAlert()[COV] = 1 BatteryStatus()[TCA] = 1 |
| Alert, ChargingStatus()[STL] = 1 | Max cell voltage1..4 ≥ COV:Threshold Standard Temp Low | |
| Alert, ChargingStatus()[STH] = 1 | Max cell voltage1..4 ≥ COV:Threshold Standard Temp High | |
| Alert, ChargingStatus()[RT] = 1 | Max cell voltage1..4 ≥ COV:Threshold Rec Temp | |
| Alert, ChargingStatus()[HT] or [OT] = 1 | Max cell voltage1..4 ≥ COV:Threshold High Temp | |
| Trip, ChargingStatus()[UT] or [LT] = 1 | Max cell voltage1..4 ≥ COV:Threshold Low Temp for COV:Delay duration | SafetyAlert()[COV] = 0 SafetyStatus()[COV] = 1 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 1 Increment COVL counter |
| Trip, ChargingStatus()[STL] = 1 | Max cell voltage1..4 ≥ COV:Threshold Standard Temp Low for COV:Delay duration | |
| Trip, ChargingStatus()[STH] = 1 | Max cell voltage1..4 ≥ COV:Threshold Standard Temp High for COV:Delay duration | |
| Trip, ChargingStatus()[RT] = 1 | Max cell voltage1..4 ≥ COV:Threshold Rec Temp for COV:Delay duration | |
| Trip, ChargingStatus()[HT] or [OT] = 1 | Max cell voltage1..4 ≥ COV:Threshold High Temp for COV:Delay duration | |
| Recovery, ChargingStatus()[UT] or [LT] = 1 | SafetyStatus()[COV] = 1 AND Max cell voltage1..4 ≤ COV:Recovery Low Temp | SafetyStatus()[COV] = 0 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 0 |
| Recovery, ChargingStatus()[STL] = 1 | SafetyStatus()[COV] = 1 AND Max cell voltage1..4 ≤ COV:Recovery Standard Temp Low | |
| Recovery, ChargingStatus()[STH] = 1 | SafetyStatus()[COV] = 1 AND Max cell voltage1..4 ≤ COV:Recovery Standard Temp High | |
| Recovery, ChargingStatus()[RT] = 1 | SafetyStatus()[COV] = 1 AND Max cell voltage1..4 ≤ COV:Recovery Rec Temp | |
| Recovery, ChargingStatus()[HT] or [OT] = 1 | SafetyStatus()[COV] = 1 AND Max cell voltage1..4 ≤ COV:Recovery High Temp | |
| Latch Alert | COVL counter > 0 | SafetyAlert()[COVL] = 1 if EnabledProtections[COVL] is set. PFAlert()[COVL] = 1 if EnabledPF[COVL] is set |
| Latch Trip | COVL counter ≥ COV:Latch limit | SafetyStatus()[COVL] = 1 if EnabledProtections[COVL] is set PFStatus()[COVL] = 1 if EnabledPF[COVL] is set. PFAlert()[COVL] = 0 SafetyAlert()[COVL] = 0 OperationStatus()[XCHG] = 1 |
| Latch Reset([NR]=0) | SafetyStatus()[COVL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[COVL] = 0 Reset COVL counter. OperationStatus[XCHG] = 0 if SafetyStatus()[COV] = 0 |
| Latch Reset([NR]=1) | (SafetyStatus()[COVL] = 1 AND DA Configuration[NR]=1 for COV:Reset time | SafetyStatus()[COVL] = 0 Reset COVL counter. OperationStatus[XCHG] = 0 if SafetyStatus()[COV] = 0 |
The BQ40Z50-R5 device has two independent overcurrent in charge protections that can be set to different current and delay thresholds to accommodate different charging behaviors.
| Status | Condition | Action |
|---|---|---|
| Normal | Current() < OCC1:Threshold | SafetyAlert()[OCC1] = 0 |
| Normal | Current() < OCC2:Threshold | SafetyAlert()[OCC2] = 0 |
| Alert | Current() ≥ OCC1:Threshold | SafetyAlert()[OCC1] = 1 BatteryStatus()[TCA] = 1 |
| Alert | Current() ≥ OCC2:Threshold | SafetyAlert()[OCC2] = 1 BatteryStatus()[TCA] = 1 |
| Trip | Current() ≥ OCC1:Threshold for OCC1:Delay duration | SafetyAlert()[OCC1] = 0 SafetyStatus()[OCC1] = 1 BatteryStatus()[TCA] = 0 Charging is not allowed. OperationStatus()[XCHG] = 1 |
| Trip | Current() ≥ OCC2:Threshold for OCC2:Delay duration | SafetyAlert()[OCC2] = 0 SafetyStatus()[OCC2] = 1 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 1 |
| Recovery | SafetyStatus()[OCC1] = 1 AND Current() ≤ OCC:Recovery Threshold for OCC:Recovery Delay time | SafetyStatus()[OCC1] = 0 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 0 |
| Recovery | SafetyStatus()[OCC2] = 1 AND Current() ≤ OCC:Recovery Threshold for OCC:Recovery Delay time | SafetyStatus()[OCC2] = 0 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 0 |
The BQ40Z50-R5 device has two independent overcurrent in discharge protections that can be set to current and delay thresholds to accommodate different load behaviors. Additionally, this protection feature can be enabled to create a PF by setting the [OCDL] bit in Enabled PF C register.
| Status | Condition | Action |
|---|---|---|
| Normal | Current() > OCD1:Threshold | SafetyAlert()[OCD1] = 0 SafetyAlert()[OCDL] = 0 PFAlert()[SOCDL] = 0 Decrement OCDL1 counter by one after each OCD:Counter Dec Delay period, if OCDL1 counter > 0 |
| Normal | Current() > OCD2:Threshold | SafetyAlert()[OCD2] = 0 SafetyAlert()[OCDL] = 0 PFAlert()[SOCDL] = 0 Decrement OCDL2 counter by one after each OCD:Counter Dec Delay period if OCDL2 counter > 0 |
| Alert | Current() ≤ OCD1:Threshold | SafetyAlert()[OCD1] = 1 BatteryStatus()[TDA] = 1 |
| Alert | Current() ≤ OCD2:Threshold | SafetyAlert()[OCD2] = 1 BatteryStatus()[TDA] = 1 |
| Trip | Current() ≤ OCD1:Threshold for OCD1:Delay duration | SafetyAlert()[OCD1] = 0 SafetyStatus()[OCD1] = 1 BatteryStatus()[TDA] = 0 OperationStatus()[XDSG] = 1 Increment OCDL1 counter |
| Trip | Current() ≤ OCD2:Threshold for OCD2:Delay duration | SafetyAlert()[OCD2] = 0 SafetyStatus()[OCD2] = 1 BatteryStatus()[TDA] = 0 OperationStatus()[XDSG] = 1 Increment OCDL2 counter |
| Recovery | SafetyStatus()[OCD1] = 1 AND Current() ≥ OCD:Recovery Threshold for OCD:Recovery Delay time | SafetyStatus()[OCD1] = 0 BatteryStatus()[TDA] = 0 OperationStatus()[XDSG] = 0 |
| Recovery | SafetyStatus()[OCD2] = 1 AND Current() ≥ OCD:Recovery Threshold for OCD:Recovery Delay time | SafetyStatus()[OCD2] = 0 BatteryStatus()[TDA] = 0 OperationStatus()[XDSG] = 0 |
| Recovery | SafetyStatus()[OCD2] = 1 AND Current() ≥ OCD:Recovery Threshold for OCD:Recovery Delay time | SafetyStatus()[OCD2]=0 OperationStatus()[XDSG]=0 BatteryStatus()[TDA] = 0 |
| Latch Alert | OCDL counter > 0 | SafetyAlert()[OCDL] = 1 if SafetyEnable[OCDL] is set. PFAlert()[SOCDL] = 1 if PFEnable()[AOCDL] is set. |
| Latch Trip | OCDL counter ≥ OCD:Latch limit | SafetyStatus()[OCDL] = 1 if SafetyEnable[OCDL] is set. PFStatus()[SOCDL] = 1 if PFEnable()[SCOV] is set. SafetyAlert()[OCDL] = PFAlert()[SOCDL] = 0 |
| Latch Reset([NR] = 0) | SafetyStatus()[OCDL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[OCDL] = 0 Reset OCDL counter. OperationStatus[XDSG] = 0 if SafetyStatus()[OCD1] = 0 and SafetyStatus()[OCD2] = 0 |
| Latch Reset([NR] = 1) | SafetyStatus()[OCDL] = 1 AND DA Configuration[NR] = 1 for OCD:Reset time | SafetyStatus()[OCDL] = 0 Reset OCDL counter. OperationStatus[XDSG] = 0 if SafetyStatus()[OCD1] = 0 and SafetyStatus()[OCD2] = 0 |
The BQ40Z50-R5 device has three main hardware-based protections—AOLD, ASCC, and ASCD1,2—with adjustable current and delay time. Setting AFE Protection Configuration[RSNS] divides the threshold value in half. The Threshold settings are in mV; therefore, the actual current that triggers the protection is based on the RSENSE used in the schematic design.
In addition, setting the AFE Protection Configuration[SCDDx2] bit provides an option to double all of the SCD1,2 delay times for maximum flexibility towards the application's needs.
For details on how to configure the AFE hardware protection, refer to the tables in Appendix A.
All of the hardware-based protections provide a Trip/Latch Alert/Recovery protection. The latch feature stops the FETs from toggling on and off continuously on a persistent faulty condition.
In general, when a fault is detected after the Delay time, the CHG and DSG FETs will be disabled (Trip stage), and an internal fault counter will be incremented (Alert stage). Since both FETs are off, the current will drop to 0 mA. After Recovery time, the CHG and DSG FETs will be turned on again (Recovery stage).
If the alert is caused by a current spike, the fault count will be decremented after Counter Dec Delay time. If this is a persistent faulty condition, the device will enter the Trip stage after Delay time, and repeat the Trip/Latch Alert/Recovery cycle. The internal fault counter is incremented every time the device goes through the Trip/Latch Alert/Recovery cycle. Once the internal fault counter hits the Latch Limit, the protection enters a Latch stage and the fault will only be cleared through the Latch Reset condition.
The Trip/Latch Alert/Recovery/Latch stages are documented in each of the following hardware-based protection sections.
The recovery condition for the removable pack ([NR] = 0) is based on the transition on the PRES pin, while the recovery condition for the embedded pack ([NR] = 1) is based on the Reset time.
The BQ40Z50-R5 device has a hardware-based overload in discharge protection with adjustable current and delay time. Additionally, this protection feature can be enabled to create a PF by setting the [AOLDL] bit in the Enabled PF B register.
| Status | Condition | Action |
|---|---|---|
| Normal | Current() > (OLD Threshold[3:0]/RSENSE) | SafetyAlert()[AOLDL] = 0, if OLDL counter = 0 PFAlert()[SAOLDL] = 0 Decrement AOLDL counter by one after each OLD:Counter Dec Delay period, if AOLDL counter > 0 |
| Trip | Current() ≤ (OLD Threshold[3:0]/RSENSE) for OLD Threshold[7:4] duration | SafetyStatus()[AOLD] = 1 OperationStatus()[XDSG] = 1 Increment AOLDL counter |
| Recovery | SafetyStatus()[AOLD] = 1 for OLD:Recovery time | SafetyStatus()[AOLD] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[AOLDL] = 0. |
| Latch Alert | AOLDL counter > 0 | SafetyAlert()[AOLDL] = 1 PFAlert()[SAOLDL] = 1, if PFEnable()[SAOLDL] is set. |
| Latch Trip | AOLDL counter ≥ OLD:Latch Limit | SafetyAlert()[AOLDL] = 0 SafetyStatus()[AOLDL] = 1 OperationStatus()[XDSG] = 1 PFAlert()[AOLDL] = 0 PFStatus()[AOLDL] = 1, if PFEnable()[AOLDL] is set. |
| Latch Reset ([NR] = 0) | SafetyStatus()[AOLDL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[AOLDL] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[AOLD] = 0. |
| Latch Reset ([NR] = 1) | SafetyStatus()[AOLDL] = 1 AND DA Configuration[NR] = 1 for OLD:Reset time | SafetyStatus()[AOLDL] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[AOLD] = 0. |
The BQ40Z50-R5 device has a hardware-based short circuit in charge protection with adjustable current and delay time. Additionally, this protection feature can be enabled to create a PF by setting the [ASCCL] bit in the Enabled PF B register.
| Status | Condition | Action |
|---|---|---|
| Normal | Current() < (SCC Threshold[2:0]/RSENSE) | SafetyAlert()[ASCCL] = 0, if ASCCL counter = 0 PFAlert()[ASCCL] = 0 Decrement ASCCL counter by one after each SCC:Counter Dec Delay period, if ASCCL counter > 0 |
| Trip | Current() ≥ (SCC Threshold[2:0]/RSENSE) for SCC Threshold[7:4] duration | SafetyStatus()[ASCC] = 1 BatteryStatus()[TCA] = 1 OperationStatus()[XCHG] = 1 increment ASCCL counter |
| Recovery | SafetyStatus()[ASCC] = 1 for SCC:Recovery time | SafetyStatus()[ASCC] = 0 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCCL] = 0. |
| Latch Alert | ASCCL counter > 0 | SafetyAlert()[ASCCL] = 1 PFAlert()[ASCCL] = 1, if PFEnable()[ASCCL] is set. |
| Latch Trip | ASCCL counter ≥ SCC:Latch Limit | SafetyAlert()[ASCCL] = 0 SafetyStatus()[ASCCL] = 1 OperationStatus()[XCHG] = 1 PFAlert()[ASCCL] = 0 PFStatus()[ASCCL] = 1, if PFEnable()[ASCCL] is set. |
| Latch Reset ([NR] = 0) | SafetyStatus()[ASCCL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[ASCCL] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCC] = 0 |
| Latch Reset ([NR] = 1) | SafetyStatus()[ASCCL] = 1 AND DA Configuration[NR] = 1 for SCC:Reset time | SafetyStatus()[ASCCL] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCC] = 0 |