The UCD90xxx family of digital sequencers, also known as system health monitors, are flexible and powerful enough to meet user sequencing, monitoring, margining and other needs. The entire families of devices are designed to have similar behaviors, but with a different number of rails or some other minor features. Users only need to learn how to use the device once, and can then seamlessly switch to other devices within the family that best fit their future designs. This document is to help applications to access GPIOs from the devices. This document does not apply to the UCD9080 and UCD9081 devices. All commands listed in the document can be found in the publications listed in Section 5.

All byte values are represented in hexadecimal format. These are the codes to understand all I²C communications that occur:

• [St] - This is the I²C Start bit.
• [Sr] - This is the I²C Restart bit. It is identical to the Start bit.
• [Sp] - This is the I²C Stop bit.
• [A] - This is the I²C Acknowledge bit.
• [N] - This is I²C No Acknowledge bit or NACK.
• [AddrW] - This is the I²C device address with the Write bit.
• [AddrR] - This is the I²C device address with the Read bit.
• [W:x55] - This is an example of a write byte for value 55 hexadecimal.
• [W/R:Data_ⁿ] - This is to indicate that a byte is being write/read by the I²C master. The n subscript is an ordered integer use to distinguish multiple bytes read back. Data_1 is the MSB, and Data_2 is the LSB for two bytes read.

UCD90xxx families of digital sequencers have different GPIO capacity. Please refer to Table 2-1 for the details.

UCD90xxx sequencer provides a pair of commands to access GPIO pins. These two commands are GPIO_SELECT (command code 0xFA) and GPIO_CONFIG (command code 0xFB). Both commands follow read/write protocol defined by SMBUS as shown in Figure 3-1.

This read and or write byte command determines to which GPIO that the GPIO_CONFIG command applies. The payload of this command is the Pin ID defined by the following Tables Table 3-1, Table 3-2, and Table 3-3.

This read/write byte command, when applications write, is to configured the GPIO pin assigned by the GPIO_SELECT(FBh) command to a command based GPIO. When application reads, it is to return the status of the assigned GPIO regardless how this pin is configured.

The Status bit is read-only and gives the current state of the pin. The Out_Enable bit determines if the pin is an output (1 – actively driven) or an input (0 – high impedance). The Out_Value bit determines the state of the pin when it is configured as an output. The Enable bit is a flag indicating whether this command should be processed. When the Enable bit is cleared, this command is ignored. If user wants to temporarily change to an output pin’s state, this command should be written twice. In the first time, the Enable bit should be set to 1 such that the changes can be applied. In the second time, the Enable bit should be set to 0. This will not change the pin’s state; and because the Enable bit is 0, STORE_DEFAULT_ALL command will ignore this command when storing configurations from RAM to flash. This way, the new temporary configuration will not overwrite the default configuration

NOTE: Configuring a pin that is also being used by another function (enable, fan control, LGPO, GPI and so forth) may likely result in unexpected and unwanted behavior

This section demonstrates how to use both GPIO_SELECT(FAh) and GPIO_CONFIG(FBh) commands to configure or read GPIOs.

This section is to demonstrate how to configure a GPIO pin(FPWM2_GPIO6) to be a Hi-Z signal as shown in Figure 4-1.

The Pid ID of the FPWM2_GPIO6 is 1 from Table 3-1 and Table 3-2.

Application need send out the following commands:

Write GPIO_SELECT command to choose the target GPIO. Payload 0x01 is to select FPWM2_GPIO6 pin.

• [St] [AddrW] [A] [W:0xFA] [A] [W:0X01][A][Sp]

Write GPIO_CONFIG command to output HIGH signal. Payload 0x1 is to enable the Pin without output disable.

• [St] [AddrW] [A] [W:0xFB] [A] [W:0X01][A][Sp]

This section demonstrates how to configure a GPIO pin (FPWM8_GPIO12) to output HIGH or LOW signal as shown in Figure 4-2.

The Pid ID of the FPWM8_GPIO12 is 7 from Table 3-1 and Table 3-2

Application need send out the following commands:

Write GPIO_SELECT command to choose the target GPIO. Payload 0x07 is to select FPWM8_GPIO12 pin

• [St] [AddrW] [A] [W:0xFA] [A] [W:0X07][A][Sp]

Write GPIO_CONFIG command to output HIGH signal. Payload 0x7 is to enable the Pin and output HIGH

• [St] [AddrW] [A] [W:0xFB] [A] [W:0X07][A][Sp]

Write GPIO_CONFIG command to output LOW signal. Payload 0x3 is to enable the Pin and output LOW

• [St] [AddrW] [A] [W:0xFB] [A] [W:0X03][A][Sp]

This section demonstrates how to read status of a GPIO pin (FPWM8_GPIO12).

The Pid ID of the FPWM8_GPIO12 is 7 from Table 3-1Table 3-2.

Application need sends out the following commands:

Write GPIO_SELECT command to choose the target GPIO. Payload 0x07 is to select FPWM8_GPIO12 pin,

• [St] [AddrW] [A] [W:0xFA] [A] [W:0X07][A][Sp]

Read GPIO_CONFIG command to get the status of FPWM8_GPIO12

• [St] [AddrW] [A] [W:0xFB] [A] [SR][Addr][A][R:data][N][Sp]

If the bit 3 of the return data is 1, the signal of the FPWM8_GPIO12 is HIGH otherwise it is LOW.

• Texas Instruments, UCD90xxx Sequencer and System Health Controller PMBus Command Reference User's Guide.
• Texas Instruments, UCD90320 Sequencer and System Health Controller PMBus Command Reference User's Guide.
• Texas Instruments, UCD90320U Sequencer and System Health Controller PMBus Command Reference User's Guide.
• System Management Bus(SMBus) Specification 2.0.
• The PMBus Power System Management Protocol Specification Part II - Command Language, Revision 1.1, 5 February 2007, available from www.pmbus.org.